linux-kernel - Re: [PATCH v5 21/34] arm_mpam: Register and enable IRQs

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Message-ID: <9f1feadc-076b-49cd-9cbb-d2fec0950128@nvidia.com>
Date: Mon, 17 Nov 2025 21:30:08 -0800
From: Fenghua Yu <fenghuay@...dia.com>
To: Ben Horgan <ben.horgan@....com>, james.morse@....com
Cc: amitsinght@...vell.com, baisheng.gao@...soc.com,
 baolin.wang@...ux.alibaba.com, bobo.shaobowang@...wei.com,
 carl@...amperecomputing.com, catalin.marinas@....com, dakr@...nel.org,
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 lcherian@...vell.com, lenb@...nel.org, linux-acpi@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
 lpieralisi@...nel.org, peternewman@...gle.com, quic_jiles@...cinc.com,
 rafael@...nel.org, robh@...nel.org, rohit.mathew@....com,
 scott@...amperecomputing.com, sdonthineni@...dia.com, sudeep.holla@....com,
 tan.shaopeng@...itsu.com, will@...nel.org, xhao@...ux.alibaba.com,
 Shaopeng Tan <tan.shaopeng@...fujitsu.com>, Zeng Heng <zengheng4@...wei.com>
Subject: Re: [PATCH v5 21/34] arm_mpam: Register and enable IRQs



On 11/17/25 09:00, Ben Horgan wrote:
> From: James Morse <james.morse@....com>
> 
> Register and enable error IRQs. All the MPAM error interrupts indicate a
> software bug, e.g. out of range partid. If the error interrupt is ever
> signalled, attempt to disable MPAM.
> 
> Only the irq handler accesses the MPAMF_ESR register, so no locking is
> needed. The work to disable MPAM after an error needs to happen at process
> context as it takes mutex. It also unregisters the interrupts, meaning
> it can't be done from the threaded part of a threaded interrupt.
> Instead, mpam_disable() gets scheduled.
> 
> Enabling the IRQs in the MSC may involve cross calling to a CPU that
> can access the MSC.
> 
> Once the IRQ is requested, the mpam_disable() path can be called
> asynchronously, which will walk structures sized by max_partid. Ensure
> this size is fixed before the interrupt is requested.
> 
> CC: Rohit Mathew <rohit.mathew@....com>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@...wei.com>
> Reviewed-by: Gavin Shan <gshan@...hat.com>
> Tested-by: Rohit Mathew <rohit.mathew@....com>
> Tested-by: Fenghua Yu <fenghuay@...dia.com>
> Tested-by: Shaopeng Tan <tan.shaopeng@...fujitsu.com>
> Tested-by: Peter Newman <peternewman@...gle.com>
> Tested-by: Carl Worth <carl@...amperecomputing.com>
> Tested-by: Gavin Shan <gshan@...hat.com>
> Tested-by: Zeng Heng <zengheng4@...wei.com>
> Signed-off-by: James Morse <james.morse@....com>
> Signed-off-by: Ben Horgan <ben.horgan@....com>

Reviewed-by: Fenghua Yu <fenghuay@...dia.com>

Thanks.

-Fenghua