| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20251118-kaana-gpu-support-v4-0-86eeb8e93fb6@oss.qualcomm.com>
Date: Tue, 18 Nov 2025 14:20:27 +0530
From: Akhil P Oommen <akhilpo@....qualcomm.com>
To: Rob Clark <robin.clark@....qualcomm.com>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Sean Paul <sean@...rly.run>,
Dmitry Baryshkov <lumag@...nel.org>,
Abhinav Kumar <abhinav.kumar@...ux.dev>,
Jessica Zhang <jesszhan0024@...il.com>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Jonathan Marek <jonathan@...ek.ca>,
Jordan Crouse <jordan@...micpenguin.net>,
Will Deacon <will@...nel.org>, Robin Murphy <robin.murphy@....com>,
Joerg Roedel <joro@...tes.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>,
Connor Abbott <cwabbott0@...il.com>
Cc: linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org,
linux-arm-kernel@...ts.infradead.org, iommu@...ts.linux.dev,
devicetree@...r.kernel.org, Akhil P Oommen <akhilpo@....qualcomm.com>,
stable@...r.kernel.org, Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
Rob Clark <rob.clark@....qualcomm.com>,
Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH v4 00/22] drm/msm/adreno: Introduce Adreno 8xx family
support
This series adds the A8xx HWL along with Adreno 840 GPU support to the
drm-msm driver. A8x is the next generation in the Adreno family,
featuring a significant hardware design change. A major update to the
design is the introduction of 'Slice' architecture. Slices are sort of
mini-GPUs within the GPU which are more independent in processing Graphics
and compute workloads. Also, in addition to the BV and BR pipe we saw in
A7x, CP has more concurrency with additional pipes.
>From KMD-HW SWI perspective, there is significant register shuffling in
some of the blocks. For slice or aperture related registers which are
virtualized now, KMD/crashdumper has to configure an aperture register
to access them. On the GMU front, there are some shuffling in register
offsets, but it is manageable as of now. There is a new HFI message to
transfer data tables and new power related features to support higher
peak currents and thermal mitigations.
Adreno 840 GPU is the second generation architecture in the A8x family
present in Kaanapali (a.k.a Snapdragon 8 Elite Gen 5) chipset [1]. It
has a maximum of 3 slices with 2 SPs per slice. Along with the 3-slice
configuration, there is also another 2-slice SKU (Partial Slice SKU).
A840 GPU has a bigger 18MB of GMEM which can be utilized for graphics
and compute workload. It also features improved Concurrent binning
support, UBWC v6 etc.
Adreno X2-85 GPU present in Glymur chipset is very similar to A840
architecturally. So adding initial support for it requires just an
additional entry in the catalog with the necessary register lists.
This series adds only the driver side support along with a few dt bindings
updates. Devicetree patches will be sent separately, but those who
are interested can take look at it from the Qualcomm's public tree [2].
Features like coredump, gmu power features, ifpc, preemption etc will be
added in a future series.
Initial few patches are for improving code sharing between a6xx/a7xx and
a8x routines. Then there is a patch to rebase GMU register offsets from
GPU's base. Rest of the patches add A8x HWL and Adreno 840/X2-85 GPU
support.
Mesa support for A8x/A840 GPU is WIP and will be posted in the near
future.
The last patch in the series ("drm/msm/a8xx: Add UBWC v6 support") has a
compile time dependency on the below patch from the qcom-soc tree
("soc: qcom: ubwc: Add config for Kaanapali"):
https://lore.kernel.org/lkml/20250930-kaana-gpu-support-v1-1-73530b0700ed@oss.qualcomm.com/
[1] https://www.qualcomm.com/products/mobile/snapdragon/smartphones/snapdragon-8-series-mobile-platforms/snapdragon-8-elite-gen-5
[2] https://git.codelinaro.org/clo/linux-kernel/kernel-qcom/-/commit/5fb72c27909d56660db6afe8e3e08a09bd83a284
Signed-off-by: Akhil P Oommen <akhilpo@....qualcomm.com>
---
Changes in v4:
- Rebase on top of msm-next
- Clean up AQE bo during a6xx_destroy (Konrad)
- Split out UBWC v6 support into a separate patch to ease merge (Rob)
- Rebase gmu register list's offsets in a6xx_gpu_state
- Add a new patch#1 to fix Out of boud register access
- Link to v3: https://lore.kernel.org/r/20251114-kaana-gpu-support-v3-0-92300c7ec8ff@oss.qualcomm.com
Changes in v3:
- Squash gpu smmu bindings patches for Kaana and Glymur (Krzysztof)
- Reuse a6xx_flush() and drop the patch that added submit_flush callback
- Fix GBIF configs for a640 and a650 family (Konrad)
- Add partial SKU detection support
- Correct Chipids in the catalog
- Add a new patch to drop SCRATCH reg dumps (Rob)
- Read slice info right after CX gdsc is up
- Don't drop raytracing support if preemption is unsupported
- Drop the unused A840 pwrup list (Konrad)
- Updates to A840 nonctxt list (Rob)
- Capture trailers
- Link to v2: https://lore.kernel.org/r/20251110-kaana-gpu-support-v2-0-bef18acd5e94@oss.qualcomm.com
Changes in v2:
- Rebase on top of next-20251110 tag
- Include support for Glymur chipset
- Drop the ubwc_config driver patch as it is picked up
- Sync the latest a6xx register definitions from Rob's tree
- New patch to do LRZ flush to fix pagefaults
- Reuse a7xx_cx_mem_init(). Dropped related patch (Connor)
- Few changes around cp protect configuration to align it with downstream
- Fix the incorrect register usage at few places
- Updates to non-ctxt register list
- Serialize aperture updates (Rob)
- More helpful cp error irq logging
- Split A8x GMU support patch (Dmitry)
- Use devm_platform_get_and_ioremap_resource in GMU init (Konrad)
- Link to v1: https://lore.kernel.org/r/20250930-kaana-gpu-support-v1-0-73530b0700ed@oss.qualcomm.com
---
Akhil P Oommen (22):
drm/msm/a6xx: Fix out of bound IO access in a6xx_get_gmu_registers
drm/msm/a6xx: Flush LRZ cache before PT switch
drm/msm/a6xx: Fix the gemnoc workaround
drm/msm/a6xx: Skip dumping SCRATCH registers
drm/msm/adreno: Common-ize PIPE definitions
drm/msm/adreno: Move adreno_gpu_func to catalogue
drm/msm/adreno: Move gbif_halt() to adreno_gpu_func
drm/msm/adreno: Add MMU fault handler to adreno_gpu_func
drm/msm/a6xx: Sync latest register definitions
drm/msm/a6xx: Rebase GMU register offsets
drm/msm/a8xx: Add support for A8x GMU
drm/msm/a6xx: Improve MX rail fallback in RPMH vote init
drm/msm/a6xx: Share dependency vote table with GMU
drm/msm/adreno: Introduce A8x GPU Support
drm/msm/adreno: Support AQE engine
drm/msm/a8xx: Add support for Adreno 840 GPU
drm/msm/adreno: Do CX GBIF config before GMU start
drm/msm/a8xx: Add support for Adreno X2-85 GPU
dt-bindings: arm-smmu: Add Kaanapali and Glymur GPU SMMU
dt-bindings: display/msm/gmu: Add Adreno 840 GMU
dt-bindings: display/msm/gmu: Add Adreno X2-85 GMU
drm/msm/a8xx: Add UBWC v6 support
.../devicetree/bindings/display/msm/gmu.yaml | 60 +-
.../devicetree/bindings/iommu/arm,smmu.yaml | 2 +
drivers/gpu/drm/msm/Makefile | 2 +
drivers/gpu/drm/msm/adreno/a2xx_catalog.c | 7 +-
drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 50 +-
drivers/gpu/drm/msm/adreno/a2xx_gpu.h | 2 +
drivers/gpu/drm/msm/adreno/a3xx_catalog.c | 13 +-
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 52 +-
drivers/gpu/drm/msm/adreno/a3xx_gpu.h | 2 +
drivers/gpu/drm/msm/adreno/a4xx_catalog.c | 7 +-
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 54 +-
drivers/gpu/drm/msm/adreno/a4xx_gpu.h | 2 +
drivers/gpu/drm/msm/adreno/a5xx_catalog.c | 17 +-
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 61 +-
drivers/gpu/drm/msm/adreno/a5xx_gpu.h | 1 +
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 371 +++-
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 287 ++-
drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 25 +-
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 399 ++--
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 31 +-
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 2 +-
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h | 74 +-
drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 53 +
drivers/gpu/drm/msm/adreno/a6xx_hfi.h | 17 +
drivers/gpu/drm/msm/adreno/a8xx_gpu.c | 1205 ++++++++++++
drivers/gpu/drm/msm/adreno/adreno_device.c | 4 +-
.../gpu/drm/msm/adreno/adreno_gen7_0_0_snapshot.h | 420 ++---
.../gpu/drm/msm/adreno/adreno_gen7_2_0_snapshot.h | 332 ++--
.../gpu/drm/msm/adreno/adreno_gen7_9_0_snapshot.h | 470 ++---
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 38 +-
drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 1954 +++++++++++++++-----
.../gpu/drm/msm/registers/adreno/a6xx_enums.xml | 2 +-
drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml | 283 +--
.../gpu/drm/msm/registers/adreno/a7xx_enums.xml | 7 -
.../drm/msm/registers/adreno/a8xx_descriptors.xml | 120 ++
.../gpu/drm/msm/registers/adreno/a8xx_enums.xml | 289 +++
.../gpu/drm/msm/registers/adreno/adreno_common.xml | 12 +
37 files changed, 5043 insertions(+), 1684 deletions(-)
---
base-commit: 50a0b122cfc8a7dc35009ef9bf33cf6034c7bd69
change-id: 20250929-kaana-gpu-support-11d21c8fa1dc
prerequisite-message-id: <20250930-kaana-gpu-support-v1-1-73530b0700ed@....qualcomm.com>
prerequisite-patch-id: f15bd99b078d228da892fb1224e10cac31f4a5c2
prerequisite-patch-id: 5b3d152595fbcce7c118d42c00f89160bbf03d41
prerequisite-patch-id: 4387aff0073a3217132ae5da358e5d4b2cb23cb3
prerequisite-patch-id: e047a6ea27db881db0089923af688c38729a7dad
prerequisite-patch-id: e686f7f592194f7d5e943858ce4dab49da6f4d18
prerequisite-patch-id: 638bc6f946cb2c1a2c68c3713a1ce7e6839c3465
prerequisite-patch-id: a85a264e87f79e9ac34dc22124153b050f97dded
prerequisite-patch-id: 8bba83cdb88cb7a8851978590cb24033d95c21de
prerequisite-patch-id: 9f08bcf9e33501478a2312e7a317f730f167652d
prerequisite-patch-id: 65a2884909f6f0e3f111412388fde0c18a4a3334
prerequisite-patch-id: 3e9a011409f3461e3de7b1a8a4e99de6fbf02abf
prerequisite-patch-id: 0ae4c8dc17fd54c84d903badccdf7a2018ec5606
prerequisite-patch-id: 6e0829024fb62bfc4510ef4c5472392dc76efcbf
prerequisite-patch-id: 5e5e177cb37fd1c0151568744565483809f357ba
prerequisite-patch-id: c2236f76a9fda88c41ea535708be1b51fd4d444c
prerequisite-patch-id: 6e26922186365d994987026b674baa66f9ac0139
prerequisite-patch-id: 784df303a9e75f062c1e069d2bdb88578a76ba0e
Best regards,
--
Akhil P Oommen <akhilpo@....qualcomm.com>
Powered by blists - more mailing lists