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Message-ID: <20251119171016.815482037@linutronix.de>
Date: Wed, 19 Nov 2025 18:26:43 +0100 (CET)
From: Thomas Gleixner <tglx@...utronix.de>
To: LKML <linux-kernel@...r.kernel.org>
Cc: Peter Zijlstra <peterz@...radead.org>,
Gabriele Monaco <gmonaco@...hat.com>,
Mathieu Desnoyers <mathieu.desnoyers@...icios.com>,
Michael Jeanson <mjeanson@...icios.com>,
Jens Axboe <axboe@...nel.dk>,
"Paul E. McKenney" <paulmck@...nel.org>,
"Gautham R. Shenoy" <gautham.shenoy@....com>,
Florian Weimer <fweimer@...hat.com>,
Tim Chen <tim.c.chen@...el.com>,
Yury Norov <yury.norov@...il.com>,
Shrikanth Hegde <sshegde@...ux.ibm.com>
Subject: [patch V5 00/20] sched: Rewrite MM CID management
This is a follow up on the V4 series which can be found here:
https://lore.kernel.org/20251104075053.700034556@linutronix.de
The V1 cover letter contains a detailed analyisis of the issues:
https://lore.kernel.org/20251015164952.694882104@linutronix.de
TLDR: The CID management is way to complex and adds significant overhead
into scheduler hotpaths.
The series rewrites MM CID management in a more simplistic way which
focusses on low overhead in the scheduler while maintaining per task CIDs
as long as the number of threads is not exceeding the number of possible
CPUs.
The series is based on the V6 series of the rseq rewrite:
https://lore.kernel.org/20251027084220.785525188@linutronix.de
which is also available from git:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git core/rseq
The series on top of the tip core/rseq branch is available from git as
well:
git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git rseq/cid
Changes vs. V4:
- Zero mm_cid::transit on init - Mathieu
- Rephrase change logs - Mathiue
- Picked up Reviewed/Acked-by tags
Delta patch to V4 below.
Thanks,
tglx
---
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 93a2523908c4..72f368f7d6e2 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -10848,6 +10848,7 @@ void mm_init_cid(struct mm_struct *mm, struct task_struct *p)
{
mm->mm_cid.max_cids = 0;
mm->mm_cid.percpu = 0;
+ mm->mm_cid.transit = 0;
mm->mm_cid.nr_cpus_allowed = p->nr_cpus_allowed;
mm->mm_cid.users = 0;
mm->mm_cid.pcpu_thrs = 0;
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