linux-kernel - Re: [PATCH v6 1/2] dt-bindings: fpga: stratix10: add support for Agilex5

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Message-ID: <20251119-surfer-festival-da76a38dbec0@spud>
Date: Wed, 19 Nov 2025 18:36:20 +0000
From: Conor Dooley <conor@...nel.org>
To: Khairul Anuar Romli <khairul.anuar.romli@...era.com>
Cc: Moritz Fischer <mdf@...nel.org>, Xu Yilun <yilun.xu@...el.com>,
	Tom Rix <trix@...hat.com>, Dinh Nguyen <dinguyen@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Mahesh Rao <mahesh.rao@...era.com>,
	Ho Yin <adrian.ho.yin.ng@...era.com>,
	Niravkumar L Rabara <nirav.rabara@...era.com>,
	linux-fpga@...r.kernel.org, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org
Subject: Re: [PATCH v6 1/2] dt-bindings: fpga: stratix10: add support for
 Agilex5

On Wed, Nov 19, 2025 at 10:26:05AM +0800, Khairul Anuar Romli wrote:
> Agilex5 introduces changes in how reserved memory is mapped and accessed
> compared to previous SoC generations. Agilex5 compatible allows stratix10-
> FPGA manager driver to handle these changes.
> 
> Fallback is added for driver probe and init that rely on matching of table
> and DT node.
> 
> Reviewed-by: Xu Yilun <yilun.xu@...el.com>
> Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@...era.com>

.
Acked-by: Conor Dooley <conor.dooley@...rochip.com>
pw-bot: not-applicable

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