linux-kernel - [PATCH 1/3] dt-bindings: usb: dwc3-xilinx: Add MMI USB support on Versal Gen2 platform

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Message-ID: <20251119193036.2666877-2-radhey.shyam.pandey@amd.com>
Date: Thu, 20 Nov 2025 01:00:34 +0530
From: Radhey Shyam Pandey <radhey.shyam.pandey@....com>
To: <gregkh@...uxfoundation.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
	<conor+dt@...nel.org>, <michal.simek@....com>, <Thinh.Nguyen@...opsys.com>,
	<p.zabel@...gutronix.de>
CC: <linux-usb@...r.kernel.org>, <devicetree@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
	<git@....com>, Radhey Shyam Pandey <radhey.shyam.pandey@....com>
Subject: [PATCH 1/3] dt-bindings: usb: dwc3-xilinx: Add MMI USB support on Versal Gen2 platform

Versal Gen2 platform multimedia integrated (MMI) module has a USB3.2 Gen
2x1 Dual Role Device IP. Introduce a new compatibility string to support
it and make reg optional as the register space for USB wrapper IP is moved
to MMI System-Level Control registers.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@....com>
---
 .../devicetree/bindings/usb/dwc3-xilinx.yaml  | 19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
index d6823ef5f9a7..502294649a6b 100644
--- a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
+++ b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
@@ -15,6 +15,7 @@ properties:
       - enum:
           - xlnx,zynqmp-dwc3
           - xlnx,versal-dwc3
+          - xlnx,versal2-mmi-dwc3
   reg:
     maxItems: 1
 
@@ -37,8 +38,9 @@ properties:
       A list of phandle and clock-specifier pairs for the clocks
       listed in clock-names.
     items:
-      - description: Master/Core clock, has to be >= 125 MHz
-          for SS operation and >= 60MHz for HS operation.
+      - description: Master/Core clock, has to be >= 156.25MHz in SSP
+          mode, >= 125 MHz for SS operation and >= 60MHz for HS
+          operation.
       - description: Clock source to core during PHY power down.
 
   clock-names:
@@ -87,7 +89,6 @@ patternProperties:
 
 required:
   - compatible
-  - reg
   - "#address-cells"
   - "#size-cells"
   - ranges
@@ -104,6 +105,7 @@ allOf:
           contains:
             enum:
               - xlnx,versal-dwc3
+              - xlnx,versal2-mmi-dwc3
     then:
       properties:
         resets:
@@ -117,6 +119,17 @@ allOf:
         reset-names:
           minItems: 3
 
+if:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - xlnx,zynqmp-dwc3
+          - xlnx,versal-dwc3
+then:
+  required:
+    - reg
+
 additionalProperties: false
 
 examples:
-- 
2.34.1