linux-kernel - Re: [PATCH v3 0/5] Add PCIe support for Kaanapali

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <d9c94cfb-1752-4d97-8c2b-627553e912bc@linaro.org>
Date: Wed, 19 Nov 2025 09:20:05 +0100
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Qiang Yu <qiang.yu@....qualcomm.com>, Vinod Koul <vkoul@...nel.org>,
 Kishon Vijay Abraham I <kishon@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 Jingyi Wang <jingyi.wang@....qualcomm.com>,
 Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
 Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
Subject: Re: [PATCH v3 0/5] Add PCIe support for Kaanapali

On 11/4/25 04:08, Qiang Yu wrote:
> Describe PCIe PHY. Also add required system resources like
> regulators, clocks, interrupts and registers configuration for PCIe.
> 
> Changes in v3:
> - Rebase on 20251017045919.34599-2-krzysztof.kozlowski@...aro.org
> - Add reviewed-by tag
> - Remove [PATCH v2 1/6] since it was applied
> - Link to v2: https://lore.kernel.org/all/20251015-kaanapali-pcie-upstream-v2-0-84fa7ea638a1@oss.qualcomm.com/
> 
> Changes in v2:
> - Rewrite commit msg for PATCH[3/6]
> - Keep keep pcs-pcie reigster definitions sorted.
> - Add Reviewed-by tag.
> - Keep qmp_pcie_of_match_table sorted.
> - Link to v1: https://lore.kernel.org/all/20250924-knp-pcie-v1-0-5fb59e398b83@oss.qualcomm.com/
> 
> Signed-off-by: Qiang Yu <qiang.yu@....qualcomm.com>
> ---
> Qiang Yu (5):
>        dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add Kaanapali compatible
>        phy: qcom-qmp: qserdes-txrx: Add complete QMP PCIe PHY v8 register offsets
>        phy: qcom-qmp: pcs-pcie: Add v8 register offsets
>        phy: qcom-qmp: qserdes-com: Add some more v8 register offsets
>        phy: qcom: qmp-pcie: add QMP PCIe PHY tables for Kaanapali
> 
>   .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml   |   3 +
>   drivers/phy/qualcomm/phy-qcom-qmp-pcie.c           | 194 +++++++++++++++++++++
>   drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v8.h    |  34 ++++
>   drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v8.h |  11 ++
>   .../qualcomm/phy-qcom-qmp-qserdes-txrx-pcie-v8.h   |  71 ++++++++
>   5 files changed, 313 insertions(+)
> ---
> base-commit: 0688945f3e5f85f64c7fc9157223f92e0fc5cfad
> change-id: 20251103-kaanapali-pcie-phy-67a850bfe384
> 
> Best regards,

For the serie:
Reviewed-by: Neil Armstrong <neil.armstrong@...aro.org>