linux-kernel - Re: [PATCH v3 2/3] phy: qcom: edp: Make the number of clocks flexible

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Message-ID: <84e53d61-ef32-4f15-aa51-132acb83c52d@linaro.org>
Date: Wed, 19 Nov 2025 09:22:00 +0100
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Abel Vesa <abel.vesa@...aro.org>, Vinod Koul <vkoul@...nel.org>,
 Kishon Vijay Abraham I <kishon@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Bjorn Andersson <andersson@...nel.org>,
 Dmitry Baryshkov <lumag@...nel.org>, Konrad Dybcio <konradybcio@...nel.org>,
 Sibi Sankar <quic_sibis@...cinc.com>,
 Rajendra Nayak <quic_rjendra@...cinc.com>
Cc: Johan Hovold <johan@...nel.org>, Taniya Das <quic_tdas@...cinc.com>,
 Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
 linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 stable@...r.kernel.org
Subject: Re: [PATCH v3 2/3] phy: qcom: edp: Make the number of clocks flexible

On 9/9/25 09:33, Abel Vesa wrote:
> On X Elite, the DP PHY needs another clock called ref, while all other
> platforms do not.
> 
> The current X Elite devices supported upstream work fine without this
> clock, because the boot firmware leaves this clock enabled. But we should
> not rely on that. Also, even though this change breaks the ABI, it is
> needed in order to make the driver disables this clock along with the
> other ones, for a proper bring-down of the entire PHY.
> 
> So in order to handle these clocks on different platforms, make the driver
> get all the clocks regardless of how many there are provided.
> 
> Cc: stable@...r.kernel.org # v6.10
> Fixes: db83c107dc29 ("phy: qcom: edp: Add v6 specific ops and X1E80100 platform support")
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> ---
>   drivers/phy/qualcomm/phy-qcom-edp.c | 16 ++++++++--------
>   1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c
> index f1b51018683d51df064f60440864c6031638670c..ca9bb9d70e29e1a132bd499fb9f74b5837acf45b 100644
> --- a/drivers/phy/qualcomm/phy-qcom-edp.c
> +++ b/drivers/phy/qualcomm/phy-qcom-edp.c
> @@ -103,7 +103,9 @@ struct qcom_edp {
>   
>   	struct phy_configure_opts_dp dp_opts;
>   
> -	struct clk_bulk_data clks[2];
> +	struct clk_bulk_data *clks;
> +	int num_clks;
> +
>   	struct regulator_bulk_data supplies[2];
>   
>   	bool is_edp;
> @@ -218,7 +220,7 @@ static int qcom_edp_phy_init(struct phy *phy)
>   	if (ret)
>   		return ret;
>   
> -	ret = clk_bulk_prepare_enable(ARRAY_SIZE(edp->clks), edp->clks);
> +	ret = clk_bulk_prepare_enable(edp->num_clks, edp->clks);
>   	if (ret)
>   		goto out_disable_supplies;
>   
> @@ -885,7 +887,7 @@ static int qcom_edp_phy_exit(struct phy *phy)
>   {
>   	struct qcom_edp *edp = phy_get_drvdata(phy);
>   
> -	clk_bulk_disable_unprepare(ARRAY_SIZE(edp->clks), edp->clks);
> +	clk_bulk_disable_unprepare(edp->num_clks, edp->clks);
>   	regulator_bulk_disable(ARRAY_SIZE(edp->supplies), edp->supplies);
>   
>   	return 0;
> @@ -1092,11 +1094,9 @@ static int qcom_edp_phy_probe(struct platform_device *pdev)
>   	if (IS_ERR(edp->pll))
>   		return PTR_ERR(edp->pll);
>   
> -	edp->clks[0].id = "aux";
> -	edp->clks[1].id = "cfg_ahb";
> -	ret = devm_clk_bulk_get(dev, ARRAY_SIZE(edp->clks), edp->clks);
> -	if (ret)
> -		return ret;
> +	edp->num_clks = devm_clk_bulk_get_all(dev, &edp->clks);
> +	if (edp->num_clks < 0)
> +		return dev_err_probe(dev, edp->num_clks, "failed to parse clocks\n");
>   
>   	edp->supplies[0].supply = "vdda-phy";
>   	edp->supplies[1].supply = "vdda-pll";
> 

Reviewed-by: Neil Armstrong <neil.armstrong@...aro.org>