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Message-ID: <20251119110505.100253-2-prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Wed, 19 Nov 2025 11:05:02 +0000
From: Prabhakar <prabhakar.csengg@...il.com>
To: Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-renesas-soc@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Prabhakar <prabhakar.csengg@...il.com>,
Biju Das <biju.das.jz@...renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: [PATCH 1/4] arm64: dts: renesas: r9a09g057: Add USB3 PHY/Host nodes
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Add USB3 PHY/Host nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
---
arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 60 ++++++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index 25b534bd5652..8b8ed4fbb599 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -1087,6 +1087,66 @@ usb21phyrst: usb21phy-reset@...40000 {
status = "disabled";
};
+ xhci0: usb@...50000 {
+ compatible = "renesas,r9a09g057-xhci", "renesas,r9a09g047-xhci";
+ reg = <0 0x15850000 0 0x10000>;
+ interrupts = <GIC_SPI 759 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 758 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 757 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 756 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 755 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "all", "smi", "hse", "pme", "xhc";
+ clocks = <&cpg CPG_MOD 0xaf>;
+ power-domains = <&cpg>;
+ resets = <&cpg 0xaa>;
+ phys = <&usb3_phy0>, <&usb3_phy0>;
+ phy-names = "usb2-phy", "usb3-phy";
+ status = "disabled";
+ };
+
+ xhci1: usb@...60000 {
+ compatible = "renesas,r9a09g057-xhci", "renesas,r9a09g047-xhci";
+ reg = <0 0x15860000 0 0x10000>;
+ interrupts = <GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 763 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 762 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 761 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 760 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "all", "smi", "hse", "pme", "xhc";
+ clocks = <&cpg CPG_MOD 0xb1>;
+ power-domains = <&cpg>;
+ resets = <&cpg 0xab>;
+ phys = <&usb3_phy1>, <&usb3_phy1>;
+ phy-names = "usb2-phy", "usb3-phy";
+ status = "disabled";
+ };
+
+ usb3_phy0: usb-phy@...70000 {
+ compatible = "renesas,r9a09g057-usb3-phy", "renesas,r9a09g047-usb3-phy";
+ reg = <0 0x15870000 0 0x10000>;
+ clocks = <&cpg CPG_MOD 0xb0>,
+ <&cpg CPG_CORE R9A09G057_USB3_0_CLKCORE>,
+ <&cpg CPG_CORE R9A09G057_USB3_0_REF_ALT_CLK_P>;
+ clock-names = "pclk", "core", "ref_alt_clk_p";
+ power-domains = <&cpg>;
+ resets = <&cpg 0xaa>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ usb3_phy1: usb-phy@...80000 {
+ compatible = "renesas,r9a09g057-usb3-phy", "renesas,r9a09g047-usb3-phy";
+ reg = <0 0x15880000 0 0x10000>;
+ clocks = <&cpg CPG_MOD 0xb2>,
+ <&cpg CPG_CORE R9A09G057_USB3_1_CLKCORE>,
+ <&cpg CPG_CORE R9A09G057_USB3_1_REF_ALT_CLK_P>;
+ clock-names = "pclk", "core", "ref_alt_clk_p";
+ power-domains = <&cpg>;
+ resets = <&cpg 0xab>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
sdhi0: mmc@...00000 {
compatible = "renesas,sdhi-r9a09g057";
reg = <0x0 0x15c00000 0 0x10000>;
--
2.51.2
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