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Message-ID: <278991f2-69a1-46a2-83a3-4af212255e2f@rock-chips.com>
Date: Thu, 20 Nov 2025 08:59:46 +0800
From: Shawn Lin <shawn.lin@...k-chips.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@....qualcomm.com>,
Jingoo Han <jingoohan1@...il.com>, Manivannan Sadhasivam <mani@...nel.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kwilczynski@...nel.org>,
Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>
Cc: shawn.lin@...k-chips.com, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org, vincent.guittot@...aro.org,
zhangsenchuan@...incomputing.com
Subject: Re: [PATCH 1/2] PCI: dwc: Skip PME_Turn_Off broadcast and L2/L3
transition during suspend if link is not up
在 2025/11/20 星期四 2:10, Manivannan Sadhasivam 写道:
> During system suspend, if the PCIe link is not up, then there is no need
> to broadcast PME_Turn_Off message and wait for L2/L3 transition. So skip
> them.
>
Review-by: Shawn Lin <shawn.lin@...k-chips.com>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@....qualcomm.com>
> ---
> drivers/pci/controller/dwc/pcie-designware-host.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 20c9333bcb1c..8fe3454f3b13 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -1129,6 +1129,9 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci)
> u32 val;
> int ret;
>
> + if (!dw_pcie_link_up(pci))
> + goto stop_link;
> +
> /*
> * If L1SS is supported, then do not put the link into L2 as some
> * devices such as NVMe expect low resume latency.
> @@ -1162,6 +1165,7 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci)
> */
> udelay(1);
>
> +stop_link:
> dw_pcie_stop_link(pci);
> if (pci->pp.ops->deinit)
> pci->pp.ops->deinit(&pci->pp);
>
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