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Message-ID: <4h2ximhzbwzin5b475uqwf55bb5kqjsvkj7tef3ixdakgvlies@x7li43qrsody>
Date: Thu, 20 Nov 2025 07:39:27 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>
Cc: Konrad Dybcio <konradybcio@...nel.org>, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] soc: qcom: ice: Set ICE clk to turbo on probe
On Thu, Nov 20, 2025 at 03:46:51PM +0530, Abhinaba Rakshit wrote:
> On Wed, Oct 01, 2025 at 10:13:56PM -0500, Bjorn Andersson wrote:
> > On Wed, Oct 01, 2025 at 05:44:32PM +0530, Abhinaba Rakshit wrote:
> > > Set ICE core clock to turbo (max freq) provided by dt
> > > entry at ice device probe.
> > >
> > > Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>
> > > ---
> > > MMC controller lacks a clock scaling mechanism, unlike the UFS
> > > controller. By default, the MMC controller is set to TURBO mode
> > > during probe, but the ICE clock remains at XO frequency,
> > > leading to read/write performance degradation on eMMC.
> > >
> > > To address this, set the ICE clock to TURBO during probe to
> > > align it with the controller clock. This ensures consistent
> > > performance and avoids mismatches between the controller
> > > and ICE clock frequencies.
> >
> > I think this (the snippet between the "---" lines) looks like a quite
> > good commit message; but it's below the first "---" and as such not
> > actually part of the commit message and will be ignored by the tools.
> >
> > At the same time, the actual commit message ("Set ICE core...") isn't
> > very good at all, it completely lacks the problem description you
> > provide here.
> >
> > Please use this for your commit message instead.
>
> Sure, will update this properly in patchset v2.
>
> >
> > > ---
> > > drivers/soc/qcom/ice.c | 8 ++++++++
> > > 1 file changed, 8 insertions(+)
> > >
> > > diff --git a/drivers/soc/qcom/ice.c b/drivers/soc/qcom/ice.c
> > > index ec8d6bb9f426deee1038616282176bfc8e5b9ec1..eee06c499dc36a6bf380361f27e938331f1fcb10 100644
> > > --- a/drivers/soc/qcom/ice.c
> > > +++ b/drivers/soc/qcom/ice.c
> > > @@ -535,6 +535,7 @@ static struct qcom_ice *qcom_ice_create(struct device *dev,
> > > struct qcom_ice *engine;
> > > const __be32 *prop;
> > > int len;
> > > + int err;
> > >
> > > if (!qcom_scm_is_available())
> > > return ERR_PTR(-EPROBE_DEFER);
> > > @@ -577,6 +578,13 @@ static struct qcom_ice *qcom_ice_create(struct device *dev,
> > > if (!qcom_ice_check_supported(engine))
> > > return ERR_PTR(-EOPNOTSUPP);
> > >
> > > + /* Set the ICE clk rate to TURBO */
> > > + if (engine->core_clk && engine->max_freq) {
> > > + err = clk_set_rate(engine->core_clk, engine->max_freq);
> > > + if (err)
> > > + dev_err(dev, "Failed setting the clk to TURBO\n");
> > > + }
> > > +
> > > dev_dbg(dev, "Registered Qualcomm Inline Crypto Engine\n");
> > >
> > > return engine;
> > >
> > > ---
> > > base-commit: 3b9b1f8df454caa453c7fb07689064edb2eda90a
> > > change-id: 20251001-set-ice-clock-to-turbo-ecab9ea46a89
> > > prerequisite-change-id: 20251001-enable-ufs-ice-clock-scaling-9c55598295f6:v1
> > > prerequisite-patch-id: d66f521e5e625b295a1c408cdfce9bd9524ae3ba
> > > prerequisite-patch-id: 23934f3fee5aabe4a2324130ed02909352b5cf61
> >
> > We do have plenty of platforms that run the upstream kernel without any
> > changes, so please test your patch on a clean upstream kernel tree.
> >
> > Thanks,
> > Bjorn
> >
>
> Sure,
> Most of the scaling operations will be a optional configuration, which should not break
> existing platforms. However, will ensure that in patchset v2.
>
I meant you can enable this functionality on one of those targets (e.g.
Pakala MTP/QRD boots with defconfig and has UFS support), but perhaps
that's not applicable?
Regards,
Bjorn
> > >
> > > Best regards,
> > > --
> > > Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>
> > >
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