linux-kernel - Re: [PATCH v5 05/13] coresight: Define format attributes with GEN_PMU_FORMAT

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAJ9a7VjYQGzchv9z1Pypv1VtkMmZM99xi2eX4wdc-WksNPXB1g@mail.gmail.com>
Date: Thu, 20 Nov 2025 15:59:15 +0000
From: Mike Leach <mike.leach@...aro.org>
To: James Clark <james.clark@...aro.org>
Cc: Suzuki K Poulose <suzuki.poulose@....com>, 
	Alexander Shishkin <alexander.shishkin@...ux.intel.com>, Jonathan Corbet <corbet@....net>, 
	Leo Yan <leo.yan@....com>, Randy Dunlap <rdunlap@...radead.org>, coresight@...ts.linaro.org, 
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, 
	linux-doc@...r.kernel.org
Subject: Re: [PATCH v5 05/13] coresight: Define format attributes with GEN_PMU_FORMAT_ATTR()

On Tue, 18 Nov 2025 at 16:28, James Clark <james.clark@...aro.org> wrote:
>
> This allows us to define and consume them in a unified way in later
> commits.
>
> A lot of the existing code has open coded bit shifts or direct usage of
> whole config values which is error prone and hides which bits are in use
> and which are free.
>
> Reviewed-by: Leo Yan <leo.yan@....com>
> Signed-off-by: James Clark <james.clark@...aro.org>
> ---
>  drivers/hwtracing/coresight/coresight-etm-perf.c | 22 ++++++++---------
>  drivers/hwtracing/coresight/coresight-etm-perf.h | 31 ++++++++++++++++++++++++
>  2 files changed, 42 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
> index faebd7822a77..28f1bfc4579f 100644
> --- a/drivers/hwtracing/coresight/coresight-etm-perf.c
> +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
> @@ -13,6 +13,7 @@
>  #include <linux/mm.h>
>  #include <linux/init.h>
>  #include <linux/perf_event.h>
> +#include <linux/perf/arm_pmu.h>
>  #include <linux/percpu-defs.h>
>  #include <linux/slab.h>
>  #include <linux/stringhash.h>
> @@ -54,22 +55,21 @@ static DEFINE_PER_CPU(struct coresight_device *, csdev_src);
>   * The PMU formats were orignally for ETMv3.5/PTM's ETMCR 'config';
>   * now take them as general formats and apply on all ETMs.
>   */
> -PMU_FORMAT_ATTR(branch_broadcast, "config:"__stringify(ETM_OPT_BRANCH_BROADCAST));
> -PMU_FORMAT_ATTR(cycacc,                "config:" __stringify(ETM_OPT_CYCACC));
> +GEN_PMU_FORMAT_ATTR(branch_broadcast);
> +GEN_PMU_FORMAT_ATTR(cycacc);
>  /* contextid1 enables tracing CONTEXTIDR_EL1 for ETMv4 */
> -PMU_FORMAT_ATTR(contextid1,    "config:" __stringify(ETM_OPT_CTXTID));
> +GEN_PMU_FORMAT_ATTR(contextid1);
>  /* contextid2 enables tracing CONTEXTIDR_EL2 for ETMv4 */
> -PMU_FORMAT_ATTR(contextid2,    "config:" __stringify(ETM_OPT_CTXTID2));
> -PMU_FORMAT_ATTR(timestamp,     "config:" __stringify(ETM_OPT_TS));
> -PMU_FORMAT_ATTR(retstack,      "config:" __stringify(ETM_OPT_RETSTK));
> +GEN_PMU_FORMAT_ATTR(contextid2);
> +GEN_PMU_FORMAT_ATTR(timestamp);
> +GEN_PMU_FORMAT_ATTR(retstack);
>  /* preset - if sink ID is used as a configuration selector */
> -PMU_FORMAT_ATTR(preset,                "config:0-3");
> +GEN_PMU_FORMAT_ATTR(preset);
>  /* Sink ID - same for all ETMs */
> -PMU_FORMAT_ATTR(sinkid,                "config2:0-31");
> +GEN_PMU_FORMAT_ATTR(sinkid);
>  /* config ID - set if a system configuration is selected */
> -PMU_FORMAT_ATTR(configid,      "config2:32-63");
> -PMU_FORMAT_ATTR(cc_threshold,  "config3:0-11");
> -
> +GEN_PMU_FORMAT_ATTR(configid);
> +GEN_PMU_FORMAT_ATTR(cc_threshold);
>
>  /*
>   * contextid always traces the "PID".  The PID is in CONTEXTIDR_EL1
> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.h b/drivers/hwtracing/coresight/coresight-etm-perf.h
> index 5febbcdb8696..c794087a0e99 100644
> --- a/drivers/hwtracing/coresight/coresight-etm-perf.h
> +++ b/drivers/hwtracing/coresight/coresight-etm-perf.h
> @@ -20,6 +20,37 @@ struct cscfg_config_desc;
>   */
>  #define ETM_ADDR_CMP_MAX       8
>
> +#define ATTR_CFG_FLD_preset_CFG                        config
> +#define ATTR_CFG_FLD_preset_LO                 0
> +#define ATTR_CFG_FLD_preset_HI                 3
> +#define ATTR_CFG_FLD_branch_broadcast_CFG      config
> +#define ATTR_CFG_FLD_branch_broadcast_LO       8
> +#define ATTR_CFG_FLD_branch_broadcast_HI       8
> +#define ATTR_CFG_FLD_cycacc_CFG                        config
> +#define ATTR_CFG_FLD_cycacc_LO                 12
> +#define ATTR_CFG_FLD_cycacc_HI                 12
> +#define ATTR_CFG_FLD_contextid1_CFG            config
> +#define ATTR_CFG_FLD_contextid1_LO             14
> +#define ATTR_CFG_FLD_contextid1_HI             14
> +#define ATTR_CFG_FLD_contextid2_CFG            config
> +#define ATTR_CFG_FLD_contextid2_LO             15
> +#define ATTR_CFG_FLD_contextid2_HI             15
> +#define ATTR_CFG_FLD_timestamp_CFG             config
> +#define ATTR_CFG_FLD_timestamp_LO              28
> +#define ATTR_CFG_FLD_timestamp_HI              28
> +#define ATTR_CFG_FLD_retstack_CFG              config
> +#define ATTR_CFG_FLD_retstack_LO               29
> +#define ATTR_CFG_FLD_retstack_HI               29
> +#define ATTR_CFG_FLD_sinkid_CFG                        config2
> +#define ATTR_CFG_FLD_sinkid_LO                 0
> +#define ATTR_CFG_FLD_sinkid_HI                 31
> +#define ATTR_CFG_FLD_configid_CFG              config2
> +#define ATTR_CFG_FLD_configid_LO               32
> +#define ATTR_CFG_FLD_configid_HI               63
> +#define ATTR_CFG_FLD_cc_threshold_CFG          config3
> +#define ATTR_CFG_FLD_cc_threshold_LO           0
> +#define ATTR_CFG_FLD_cc_threshold_HI           11
> +
>  /**
>   * struct etm_filter - single instruction range or start/stop configuration.
>   * @start_addr:        The address to start tracing on.
>
> --
> 2.34.1
>

Reviewed-by: Mike Leach <mike.leach@...aro.org>
-- 
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK