linux-kernel - Re: [PATCH v9 11/11] vfio/nvgrace: Support get_dmabuf

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Message-ID:
 <SA1PR12MB719993F747B09154A3DDA788B0D4A@SA1PR12MB7199.namprd12.prod.outlook.com>
Date: Thu, 20 Nov 2025 17:13:05 +0000
From: Ankit Agrawal <ankita@...dia.com>
To: Leon Romanovsky <leon@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
	Logan Gunthorpe <logang@...tatee.com>, Jens Axboe <axboe@...nel.dk>, Robin
 Murphy <robin.murphy@....com>, Joerg Roedel <joro@...tes.org>, Will Deacon
	<will@...nel.org>, Marek Szyprowski <m.szyprowski@...sung.com>, Jason
 Gunthorpe <jgg@...pe.ca>, Andrew Morton <akpm@...ux-foundation.org>, Jonathan
 Corbet <corbet@....net>, Sumit Semwal <sumit.semwal@...aro.org>,
	Christian König <christian.koenig@....com>, Kees Cook
	<kees@...nel.org>, "Gustavo A. R. Silva" <gustavoars@...nel.org>, Yishai
 Hadas <yishaih@...dia.com>, Shameer Kolothum <skolothumtho@...dia.com>, Kevin
 Tian <kevin.tian@...el.com>, Alex Williamson <alex@...zbot.org>
CC: Krishnakant Jaju <kjaju@...dia.com>, Matt Ochs <mochs@...dia.com>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-block@...r.kernel.org" <linux-block@...r.kernel.org>,
	"iommu@...ts.linux.dev" <iommu@...ts.linux.dev>, "linux-mm@...ck.org"
	<linux-mm@...ck.org>, "linux-doc@...r.kernel.org"
	<linux-doc@...r.kernel.org>, "linux-media@...r.kernel.org"
	<linux-media@...r.kernel.org>, "dri-devel@...ts.freedesktop.org"
	<dri-devel@...ts.freedesktop.org>, "linaro-mm-sig@...ts.linaro.org"
	<linaro-mm-sig@...ts.linaro.org>, "kvm@...r.kernel.org"
	<kvm@...r.kernel.org>, "linux-hardening@...r.kernel.org"
	<linux-hardening@...r.kernel.org>, Alex Mastro <amastro@...com>, Nicolin Chen
	<nicolinc@...dia.com>
Subject: Re: [PATCH v9 11/11] vfio/nvgrace: Support get_dmabuf_phys

> 
> The "CXL" ranges that are remapped into BAR 2 and BAR 4 areas are not PCI
> MMIO, they actually run over the CXL-like coherent interconnect and for
> the purposes of DMA behave identically to DRAM. We don't try to model this
> distinction between true PCI BAR memory that takes a real PCI path and the
> "CXL" memory that takes a different path in the p2p framework for now.
> 
> Signed-off-by: Jason Gunthorpe <jgg@...dia.com>
> Reviewed-by: Kevin Tian <kevin.tian@...el.com>
> Tested-by: Alex Mastro <amastro@...com>
> Tested-by: Nicolin Chen <nicolinc@...dia.com>
> Signed-off-by: Leon Romanovsky <leonro@...dia.com>
> ---

Reviewed-by: Ankit Agrawal <ankita@...dia.com>