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Message-Id: <20251120-dpu-clocks-v1-1-11508054eab8@linaro.org>
Date: Thu, 20 Nov 2025 21:06:11 +0000
From: Peter Griffin <peter.griffin@...aro.org>
To: André Draszik <andre.draszik@...aro.org>,
Tudor Ambarus <tudor.ambarus@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Alim Akhtar <alim.akhtar@...sung.com>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Chanwoo Choi <cw00.choi@...sung.com>
Cc: linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Krzysztof Kozlowski <krzk@...nel.org>,
kernel-team@...roid.com, Will McVicker <willmcvicker@...gle.com>,
Juan Yescas <jyescas@...gle.com>, Doug Anderson <dianders@...gle.com>,
Peter Griffin <peter.griffin@...aro.org>
Subject: [PATCH 1/4] dt-bindings: clock: google,gs101-clock: Add DPU clock
management unit
Add dt schema documentation and clock IDs for the Display Process Unit
(DPU) clock management unit (CMU). This CMU feeds IPs such as image scaler,
enhancer and compressor.
Signed-off-by: Peter Griffin <peter.griffin@...aro.org>
---
.../bindings/clock/google,gs101-clock.yaml | 19 ++++++++++++
include/dt-bindings/clock/google,gs101.h | 36 ++++++++++++++++++++++
2 files changed, 55 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml
index 09e679c1a9def03d53b8b493929911ea902a1763..1257be9c54a42ea2387e1112e53b5ee1f03e09f5 100644
--- a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml
+++ b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml
@@ -34,6 +34,7 @@ properties:
- google,gs101-cmu-hsi2
- google,gs101-cmu-peric0
- google,gs101-cmu-peric1
+ - google,gs101-cmu-dpu
clocks:
minItems: 1
@@ -171,6 +172,24 @@ allOf:
- const: bus
- const: ip
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: google,gs101-cmu-dpu
+
+ then:
+ properties:
+ clocks:
+ items:
+ - description: External reference clock (24.576 MHz)
+ - description: DPU bus clock (from CMU_TOP)
+
+ clock-names:
+ items:
+ - const: oscclk
+ - const: bus
+
- if:
properties:
compatible:
diff --git a/include/dt-bindings/clock/google,gs101.h b/include/dt-bindings/clock/google,gs101.h
index 442f9e9037dc33198a1cee20af62fc70bbd96605..4ee46503663c1f8d9463536c347de5d991474145 100644
--- a/include/dt-bindings/clock/google,gs101.h
+++ b/include/dt-bindings/clock/google,gs101.h
@@ -634,4 +634,40 @@
#define CLK_GOUT_PERIC1_CLK_PERIC1_USI9_USI_CLK 45
#define CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK 46
+/* CMU_DPU */
+#define CLK_MOUT_DPU_BUS_USER 1
+#define CLK_DOUT_DPU_BUSP 2
+#define CLK_GOUT_DPU_PCLK 3
+#define CLK_GOUT_DPU_CLK_DPU_OSCCLK_CLK 4
+#define CLK_GOUT_DPU_AD_APB_DPU_DMA_PCLKM 5
+#define CLK_GOUT_DPU_DPUF_ACLK_DMA 6
+#define CLK_GOUT_DPU_DPUF_ACLK_DPP 7
+#define CLK_GOUT_DPU_D_TZPC_DPU_PCLK 8
+#define CLK_GOUT_DPU_GPC_DPU_PCLK 9
+#define CLK_GOUT_DPU_LHM_AXI_P_DPU_I_CLK 10
+#define CLK_GOUT_DPU_LHS_AXI_D0_DPU_I_CLK 11
+#define CLK_GOUT_DPU_LHS_AXI_D1_DPU_I_CLK 12
+#define CLK_GOUT_DPU_LHS_AXI_D2_DPU_I_CLK 13
+#define CLK_GOUT_DPU_PPMU_DPUD0_ACLK 14
+#define CLK_GOUT_DPU_PPMU_DPUD0_PCLK 15
+#define CLK_GOUT_DPU_PPMU_DPUD1_ACLK 16
+#define CLK_GOUT_DPU_PPMU_DPUD1_PCLK 17
+#define CLK_GOUT_DPU_PPMU_DPUD2_ACLK 18
+#define CLK_GOUT_DPU_PPMU_DPUD2_PCLK 19
+#define CLK_GOUT_DPU_CLK_DPU_BUSD_CLK 20
+#define CLK_GOUT_DPU_CLK_DPU_BUSP_CLK 21
+#define CLK_GOUT_DPU_SSMT_DPU0_ACLK 22
+#define CLK_GOUT_DPU_SSMT_DPU0_PCLK 23
+#define CLK_GOUT_DPU_SSMT_DPU1_ACLK 24
+#define CLK_GOUT_DPU_SSMT_DPU1_PCLK 25
+#define CLK_GOUT_DPU_SSMT_DPU2_ACLK 26
+#define CLK_GOUT_DPU_SSMT_DPU2_PCLK 27
+#define CLK_GOUT_DPU_SYSMMU_DPUD0_CLK_S1 28
+#define CLK_GOUT_DPU_SYSMMU_DPUD0_CLK_S2 29
+#define CLK_GOUT_DPU_SYSMMU_DPUD1_CLK_S1 30
+#define CLK_GOUT_DPU_SYSMMU_DPUD1_CLK_S2 31
+#define CLK_GOUT_DPU_SYSMMU_DPUD2_CLK_S1 32
+#define CLK_GOUT_DPU_SYSMMU_DPUD2_CLK_S2 33
+#define CLK_GOUT_DPU_SYSREG_DPU_PCLK 34
+
#endif /* _DT_BINDINGS_CLOCK_GOOGLE_GS101_H */
--
2.52.0.rc2.455.g230fcf2819-goog
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