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Message-Id: <20251120-lt8713sx-bridge-linux-for-next-v1-1-2246fc5fb490@qti.qualcomm.com>
Date: Thu, 20 Nov 2025 16:28:05 +0530
From: Vishnu Saini <vishnu.saini@....qualcomm.com>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Vishnu Saini <vishsain@....qualcomm.com>,
prahlad.valluru@....qualcomm.com,
Prahlad Valluru <vvalluru@....qualcomm.com>,
Vishnu Saini <vishnu.saini@....qualcomm.com>
Subject: [PATCH 1/2] arm64: dts: qcom: monaco: add lt8713sx bridge with
displayport
Monaco-evk has LT8713sx which act as DP to 3 DP output
converter. Edp PHY from monaco soc is connected to lt8713sx
as input and output of lt8713sx is connected to 3 mini DP ports.
Two of these ports are available in mainboard and one port
is available on Mezz board. lt8713sx is connected to soc over
i2c0 and with reset gpio connected to pin6 or ioexpander5.
Enable the edp nodes from monaco and enable lontium lt8713sx
bridge node.
Co-developed-by: Prahlad Valluru <vvalluru@....qualcomm.com>
Signed-off-by: Prahlad Valluru <vvalluru@....qualcomm.com>
Signed-off-by: Vishnu Saini <vishnu.saini@....qualcomm.com>
---
arch/arm64/boot/dts/qcom/monaco-evk.dts | 44 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/monaco-evk.dts b/arch/arm64/boot/dts/qcom/monaco-evk.dts
index bb35893da73d..947807f8a9cb 100644
--- a/arch/arm64/boot/dts/qcom/monaco-evk.dts
+++ b/arch/arm64/boot/dts/qcom/monaco-evk.dts
@@ -317,6 +317,20 @@ &gpu_zap_shader {
firmware-name = "qcom/qcs8300/a623_zap.mbn";
};
+&i2c0 {
+ pinctrl-0 = <&qup_i2c0_default>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ lt8713sx: lt8713sx@4f {
+ /*Display bridge chip, DP1.4/HDMI2.0/DP++ hub*/
+ compatible = "lontium,lt8713sx";
+ reg = <0x4f>;
+ reset-gpios = <&expander5 6 GPIO_ACTIVE_HIGH>;
+ };
+};
+
&i2c1 {
pinctrl-0 = <&qup_i2c1_default>;
pinctrl-names = "default";
@@ -396,6 +410,23 @@ expander6: gpio@3e {
};
};
+&mdss {
+ status = "okay";
+};
+
+&mdss_dp0 {
+ status = "okay";
+};
+
+&mdss_dp0_out {
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+};
+
+&mdss_dp0_phy {
+ status = "okay";
+};
+
&iris {
status = "okay";
};
@@ -435,6 +466,12 @@ &serdes0 {
};
&tlmm {
+ dp_hot_plug_det: dp-hot-plug-det-state {
+ pins = "gpio94";
+ function = "edp0_hot";
+ bias-disable;
+ };
+
ethernet0_default: ethernet0-default-state {
ethernet0_mdc: ethernet0-mdc-pins {
pins = "gpio5";
@@ -451,6 +488,13 @@ ethernet0_mdio: ethernet0-mdio-pins {
};
};
+ qup_i2c0_default: qup-i2c0-state {
+ pins = "gpio17", "gpio18";
+ function = "qup0_se0";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
qup_i2c1_default: qup-i2c1-state {
pins = "gpio19", "gpio20";
function = "qup0_se1";
--
2.34.1
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