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Message-ID: <xxswzi4v6gpuqbe3cczj2yjmprhvln26fl5ligsp5vkiogrnwk@hpifxivaps6j>
Date: Thu, 20 Nov 2025 18:22:55 +0530
From: Manivannan Sadhasivam <mani@...nel.org>
To: Hal Feng <hal.feng@...rfivetech.com>
Cc: Conor Dooley <conor+dt@...nel.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Palmer Dabbelt <palmer@...belt.com>, 
	Paul Walmsley <pjw@...nel.org>, Albert Ou <aou@...s.berkeley.edu>, 
	"Rafael J . Wysocki" <rafael@...nel.org>, Viresh Kumar <viresh.kumar@...aro.org>, 
	Bjorn Helgaas <bhelgaas@...gle.com>, Lorenzo Pieralisi <lpieralisi@...nel.org>, 
	Krzysztof Wilczyński <kwilczynski@...nel.org>, Emil Renner Berthing <emil.renner.berthing@...onical.com>, 
	Heinrich Schuchardt <heinrich.schuchardt@...onical.com>, E Shattow <e@...eshell.de>, devicetree@...r.kernel.org, 
	linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/5] dt-bindings: PCI: starfive,jh7110-pcie: Add
 enable-gpios property

On Thu, Nov 20, 2025 at 04:29:42PM +0800, Hal Feng wrote:
> Add enable-gpios property for controlling the PCI bus device power.
> This property had been supported in the driver but not added in the
> dt-bindings.
> 
> Acked-by: Conor Dooley <conor.dooley@...rochip.com>
> Fixes: 22fe32239770 ("dt-bindings: PCI: Add StarFive JH7110 PCIe controller")
> Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
> ---
>  .../devicetree/bindings/pci/starfive,jh7110-pcie.yaml         | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml b/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
> index 33c80626e8ec..1e36f92ec852 100644
> --- a/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
> @@ -59,6 +59,10 @@ properties:
>      description:
>        The phandle to System Register Controller syscon node.
>  
> +  enable-gpios:
> +    description: GPIO used to enable the PCI bus device power

This feels wrong to me. Is this GPIO associated with the PCIe controller? I bet
this is just controlling some regulator that powers the VDD of the PCIe
device/slot. If so, this should be added as a part of the regulator node and
referenced in the PCIe node using the existing -supply properties.

- Mani

-- 
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