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Message-ID: <161a0863-7cda-42aa-a462-c327276b3e26@amd.com>
Date: Thu, 20 Nov 2025 19:59:57 -0600
From: "Naik, Avadhut" <avadnaik@....com>
To: Borislav Petkov <bp@...en8.de>, Avadhut Naik <avadhut.naik@....com>
Cc: stable@...r.kernel.org, gregkh@...uxfoundation.org, sashal@...nel.org,
linux-kernel@...r.kernel.org,
Smita Koralahalli <Smita.KoralahalliChannabasappa@....com>,
Tony Luck <tony.luck@...el.com>, Yazen Ghannam <yazen.ghannam@....com>,
Qiuxu Zhuo <qiuxu.zhuo@...el.com>
Subject: Re: [PATCH] x86/mce: Handle AMD threshold interrupt storms
On 11/20/2025 15:53, Borislav Petkov wrote:
> On Thu, Nov 20, 2025 at 09:41:24PM +0000, Avadhut Naik wrote:
>> From: Smita Koralahalli <Smita.KoralahalliChannabasappa@....com>
>
> You need to put here
>
> "Commit <sha1> upstream."
>
Will add that.
Also, does this need to have a Fixes tag?
Didn't add one here as the original patch committed to tip didn't have one.
>> Extend the logic of handling CMCI storms to AMD threshold interrupts.
>
> ...
>
>
--
Thanks,
Avadhut Naik
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