lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20251121-rockchip-emmc-cqe-rk3576-fix-v1-1-a77805f40072@collabora.com>
Date: Fri, 21 Nov 2025 17:26:59 +0100
From: Sebastian Reichel <sebastian.reichel@...labora.com>
To: Shawn Lin <shawn.lin@...k-chips.com>, 
 Adrian Hunter <adrian.hunter@...el.com>, 
 Ulf Hansson <ulf.hansson@...aro.org>, 
 Yifeng Zhao <yifeng.zhao@...k-chips.com>
Cc: linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org, 
 linux-rockchip@...ts.infradead.org, 
 Sebastian Reichel <sebastian.reichel@...labora.com>
Subject: [PATCH] mmc: sdhci-of-dwcmshc: Fix command queue support for
 RK3576

When I added command queue engine (CQE) support for the Rockchip eMMC
controller, I missed that RK3576 has a separate platform data struct.
While things are working fine on RK3588 (I tested the ROCK 5B) and
the suspend issue is fixed on the RK3576 (I tested the Sige5), this
results in stability issues. By also adding the necessary hooks for
the RK3576 platform the following problems can be avoided:

[   15.606895] mmc0: running CQE recovery
[   15.616189] mmc0: running CQE recovery
[...]
[   25.911484] mmc0: running CQE recovery
[   25.926305] mmc0: running CQE recovery
[   25.927468] mmc0: running CQE recovery
[...]
[   26.255719] mmc0: running CQE recovery
[   26.257162] ------------[ cut here ]------------
[   26.257581] mmc0: cqhci: spurious TCN for tag 31
[   26.258034] WARNING: CPU: 0 PID: 0 at drivers/mmc/host/cqhci-core.c:796 cqhci_irq+0x440/0x68c
[   26.263786] CPU: 0 UID: 0 PID: 0 Comm: swapper/0 Not tainted 6.18.0-rc6-gd984ebbf0d15 #1 PREEMPT
[   26.264561] Hardware name: ArmSoM Sige5 (DT)
[...]
[   26.272748] Call trace:
[   26.272964]  cqhci_irq+0x440/0x68c (P)
[   26.273296]  dwcmshc_cqe_irq_handler+0x54/0x88
[   26.273689]  sdhci_irq+0xbc/0x1200
[   26.273991]  __handle_irq_event_percpu+0x54/0x1d0
[...]

Note that the above problems do not necessarily happen with every boot.

Reported-by: Adrian Hunter <adrian.hunter@...el.com>
Closes: https://lore.kernel.org/linux-rockchip/01949bc9-4873-498b-ac7d-f008393ccc4c@intel.com/
Fixes: fda1e0af7c28f ("mmc: sdhci-of-dwcmshc: Add command queue support for rockchip SOCs")
Signed-off-by: Sebastian Reichel <sebastian.reichel@...labora.com>
---
Sorry for the delay in sending this :)
---
 drivers/mmc/host/sdhci-of-dwcmshc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
index c66a8dfad47c..ee0008d91b98 100644
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -1767,6 +1767,7 @@ static const struct dwcmshc_pltfm_data sdhci_dwcmshc_rk3576_pdata = {
 		.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
 			   SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
 	},
+	.cqhci_host_ops = &rk35xx_cqhci_ops,
 	.init = dwcmshc_rk35xx_init,
 	.postinit = dwcmshc_rk3576_postinit,
 };

---
base-commit: dcbce328d3a2d87770133834210cf328c083d480
change-id: 20251121-rockchip-emmc-cqe-rk3576-fix-ec8ac72e6e32

Best regards,
-- 
Sebastian Reichel <sebastian.reichel@...labora.com>


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ