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Message-ID: <20251121190542.2447913-1-avadhut.naik@amd.com>
Date: Fri, 21 Nov 2025 19:04:03 +0000
From: Avadhut Naik <avadhut.naik@....com>
To: <x86@...nel.org>
CC: <bp@...en8.de>, <gregkh@...uxfoundation.org>, <yazen.ghannam@....com>,
<tony.luck@...el.com>, <qiuxu.zhuo@...el.com>,
<Smita.KoralahalliChannabasappa@....com>, <linux-kernel@...r.kernel.org>,
<avadhut.naik@....com>
Subject: [PATCH 0/2] Interrupt Storm support on AMD SMCA systems.
This set adds support to handle threshold interrupt storms on AMD SMCA
systems.
The first patch fixes a bug which prevents subsequent errors after a CMCI
storm subsides from being logged.
The second patch adds support for interrupt storms on AMD SMCA systems.
Avadhut Naik (1):
x86/mce: Do not clear bank's poll bit in mce_poll_banks on AMD SMCA
systems
Smita Koralahalli (1):
x86/mce: Handle AMD threshold interrupt storms
arch/x86/kernel/cpu/mce/amd.c | 5 +++++
arch/x86/kernel/cpu/mce/internal.h | 2 ++
arch/x86/kernel/cpu/mce/threshold.c | 6 +++++-
3 files changed, 12 insertions(+), 1 deletion(-)
base-commit: c4ce736c24f6fca2b73845022e9e80e5b5bedc83
--
2.43.0
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