linux-kernel - [tip: ras/core] x86/mce: Do not clear bank's poll bit in mce_poll

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <176375910192.498.7060304431995266255.tip-bot2@tip-bot2>
Date: Fri, 21 Nov 2025 21:05:01 -0000
From: "tip-bot2 for Avadhut Naik" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Avadhut Naik <avadhut.naik@....com>,
 "Borislav Petkov (AMD)" <bp@...en8.de>, stable@...r.kernel.org,
 x86@...nel.org, linux-kernel@...r.kernel.org
Subject: [tip: ras/core] x86/mce: Do not clear bank's poll bit in
 mce_poll_banks on AMD SMCA systems

The following commit has been merged into the ras/core branch of tip:

Commit-ID:     d7ac083f095d894a0b8ac0573516bfd035e6b25a
Gitweb:        https://git.kernel.org/tip/d7ac083f095d894a0b8ac0573516bfd035e6b25a
Author:        Avadhut Naik <avadhut.naik@....com>
AuthorDate:    Fri, 21 Nov 2025 19:04:04 
Committer:     Borislav Petkov (AMD) <bp@...en8.de>
CommitterDate: Fri, 21 Nov 2025 20:33:12 +01:00

x86/mce: Do not clear bank's poll bit in mce_poll_banks on AMD SMCA systems

Currently, when a CMCI storm detected on a Machine Check bank, subsides, the
bank's corresponding bit in the mce_poll_banks per-CPU variable is cleared
unconditionally by cmci_storm_end().

On AMD SMCA systems, this essentially disables polling on that particular bank
on that CPU. Consequently, any subsequent correctable errors or storms will not
be logged.

Since AMD SMCA systems allow banks to be managed by both polling and
interrupts, the polling banks bitmap for a CPU, i.e., mce_poll_banks, should
not be modified when a storm subsides.

Fixes: 7eae17c4add5 ("x86/mce: Add per-bank CMCI storm mitigation")
Signed-off-by: Avadhut Naik <avadhut.naik@....com>
Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>
Cc: stable@...r.kernel.org
Link: https://patch.msgid.link/20251121190542.2447913-2-avadhut.naik@amd.com
---
 arch/x86/kernel/cpu/mce/threshold.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/mce/threshold.c b/arch/x86/kernel/cpu/mce/threshold.c
index eebaa63..f19dd5b 100644
--- a/arch/x86/kernel/cpu/mce/threshold.c
+++ b/arch/x86/kernel/cpu/mce/threshold.c
@@ -98,7 +98,8 @@ void cmci_storm_end(unsigned int bank)
 {
 	struct mca_storm_desc *storm = this_cpu_ptr(&storm_desc);
 
-	__clear_bit(bank, this_cpu_ptr(mce_poll_banks));
+	if (!mce_flags.amd_threshold)
+		__clear_bit(bank, this_cpu_ptr(mce_poll_banks));
 	storm->banks[bank].history = 0;
 	storm->banks[bank].in_storm_mode = false;