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Message-ID: <aSAcaaU_UZobKvUy@lore-desk>
Date: Fri, 21 Nov 2025 09:01:45 +0100
From: Lorenzo Bianconi <lorenzo@...nel.org>
To: Francesco Lavra <flavra@...libre.com>
Cc: Jonathan Cameron <jic23@...nel.org>,
David Lechner <dlechner@...libre.com>,
Nuno Sá <nuno.sa@...log.com>,
Andy Shevchenko <andy@...nel.org>, linux-iio@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 3/9] iio: imu: st_lsm6dsx: move wakeup event enable
mask to event_src
> The mask value being assigned to the irq1_func and irq2_func fields of the
> irq_config struct is specific to a single event source (i.e. the wakeup
> event), and as such it should be separate from the definition of the
> interrupt function registers, which cover multiple event sources.
> In preparation for adding support for more event types, change the
> irq1_func and irq2_func type from an {address, mask} pair to an address,
> and move the mask value to a new field of struct st_lsm6dsx_event_src. No
> functional changes.
Just a nit inline. Fixing it:
Acked-by: Lorenzo Bianconi <lorenzo@...nel.org>
>
> Signed-off-by: Francesco Lavra <flavra@...libre.com>
> ---
> drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h | 7 +-
> drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 81 +++++++-------------
> 2 files changed, 31 insertions(+), 57 deletions(-)
>
> diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
> index 4c3ff1cc0097..bbb967b2754b 100644
> --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
> +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
> @@ -249,6 +249,7 @@ enum st_lsm6dsx_event_id {
>
> struct st_lsm6dsx_event_src {
> struct st_lsm6dsx_reg value;
> + u8 enable_mask;
> u8 status_reg;
> u8 status_mask;
> u8 status_x_mask;
> @@ -344,8 +345,8 @@ struct st_lsm6dsx_settings {
> struct {
> struct st_lsm6dsx_reg irq1;
> struct st_lsm6dsx_reg irq2;
> - struct st_lsm6dsx_reg irq1_func;
> - struct st_lsm6dsx_reg irq2_func;
> + u8 irq1_func;
> + u8 irq2_func;
> struct st_lsm6dsx_reg lir;
> struct st_lsm6dsx_reg clear_on_read;
> struct st_lsm6dsx_reg hla;
> @@ -444,7 +445,7 @@ struct st_lsm6dsx_hw {
> u8 ts_sip;
> u8 sip;
>
> - const struct st_lsm6dsx_reg *irq_routing;
> + u8 irq_routing;
> u8 event_threshold;
> u8 enable_event;
>
> diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
> index a71174e75f44..ce5f9213d476 100644
> --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
> +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
> @@ -328,14 +328,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
> .addr = 0x58,
> .mask = BIT(0),
> },
> - .irq1_func = {
> - .addr = 0x5e,
> - .mask = BIT(5),
> - },
> - .irq2_func = {
> - .addr = 0x5f,
> - .mask = BIT(5),
> - },
> + .irq1_func = 0x5e,
> + .irq2_func = 0x5f,
> .hla = {
> .addr = 0x12,
> .mask = BIT(5),
> @@ -394,6 +388,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
> .addr = 0x5b,
> .mask = GENMASK(5, 0),
> },
> + .enable_mask = BIT(5),
> .status_reg = 0x1b,
> .status_mask = BIT(3),
> .status_z_mask = BIT(0),
> @@ -498,14 +493,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
> .addr = 0x58,
> .mask = BIT(0),
> },
> - .irq1_func = {
> - .addr = 0x5e,
> - .mask = BIT(5),
> - },
> - .irq2_func = {
> - .addr = 0x5f,
> - .mask = BIT(5),
> - },
> + .irq1_func = 0x5e,
> + .irq2_func = 0x5f,
> .hla = {
> .addr = 0x12,
> .mask = BIT(5),
> @@ -564,6 +553,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
> .addr = 0x5b,
> .mask = GENMASK(5, 0),
> },
> + .enable_mask = BIT(5),
> .status_reg = 0x1b,
> .status_mask = BIT(3),
> .status_z_mask = BIT(0),
> @@ -698,14 +688,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
> .addr = 0x58,
> .mask = BIT(0),
> },
> - .irq1_func = {
> - .addr = 0x5e,
> - .mask = BIT(5),
> - },
> - .irq2_func = {
> - .addr = 0x5f,
> - .mask = BIT(5),
> - },
> + .irq1_func = 0x5e,
> + .irq2_func = 0x5f,
> .hla = {
> .addr = 0x12,
> .mask = BIT(5),
> @@ -805,6 +789,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
> .addr = 0x5b,
> .mask = GENMASK(5, 0),
> },
> + .enable_mask = BIT(5),
> .status_reg = 0x1b,
> .status_mask = BIT(3),
> .status_z_mask = BIT(0),
> @@ -951,14 +936,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
> .addr = 0x56,
> .mask = BIT(6),
> },
> - .irq1_func = {
> - .addr = 0x5e,
> - .mask = BIT(5),
> - },
> - .irq2_func = {
> - .addr = 0x5f,
> - .mask = BIT(5),
> - },
> + .irq1_func = 0x5e,
> + .irq2_func = 0x5f,
> .hla = {
> .addr = 0x12,
> .mask = BIT(5),
> @@ -1046,6 +1025,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
> .addr = 0x5b,
> .mask = GENMASK(5, 0),
> },
> + .enable_mask = BIT(5),
> .status_reg = 0x1b,
> .status_mask = BIT(3),
> .status_z_mask = BIT(0),
> @@ -1168,14 +1148,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
> .addr = 0x56,
> .mask = BIT(6),
> },
> - .irq1_func = {
> - .addr = 0x5e,
> - .mask = BIT(5),
> - },
> - .irq2_func = {
> - .addr = 0x5f,
> - .mask = BIT(5),
> - },
> + .irq1_func = 0x5e,
> + .irq2_func = 0x5f,
> .hla = {
> .addr = 0x12,
> .mask = BIT(5),
> @@ -1231,6 +1205,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
> .addr = 0x5b,
> .mask = GENMASK(5, 0),
> },
> + .enable_mask = BIT(5),
> .status_reg = 0x1b,
> .status_mask = BIT(3),
> .status_z_mask = BIT(0),
> @@ -1347,14 +1322,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
> .addr = 0x56,
> .mask = BIT(0),
> },
> - .irq1_func = {
> - .addr = 0x5e,
> - .mask = BIT(5),
> - },
> - .irq2_func = {
> - .addr = 0x5f,
> - .mask = BIT(5),
> - },
> + .irq1_func = 0x5e,
> + .irq2_func = 0x5f,
> .hla = {
> .addr = 0x03,
> .mask = BIT(4),
> @@ -1441,6 +1410,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
> .addr = 0x5b,
> .mask = GENMASK(5, 0),
> },
> + .enable_mask = BIT(5),
> .status_reg = 0x45,
> .status_mask = BIT(3),
> .status_z_mask = BIT(0),
> @@ -1899,10 +1869,12 @@ static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev,
> static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, bool state)
> {
> const struct st_lsm6dsx_reg *reg;
> + const struct st_lsm6dsx_event_src *src;
> + u8 enable_mask;
> unsigned int data;
> int err;
>
> - if (!hw->settings->irq_config.irq1_func.addr)
> + if (!hw->irq_routing)
> return -ENOTSUPP;
>
> reg = &hw->settings->event_settings.enable_reg;
> @@ -1915,9 +1887,10 @@ static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, bool state)
> }
>
> /* Enable wakeup interrupt */
> - data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask);
> - return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr,
> - hw->irq_routing->mask, data);
> + src = &hw->settings->event_settings.sources[ST_LSM6DSX_EVENT_WAKEUP];
> + enable_mask = src->enable_mask;
I think you can drop enable_mask here and just use src->enable_mask directly
here.
> + data = ST_LSM6DSX_SHIFT_VAL(state, enable_mask);
> + return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing, enable_mask, data);
> }
>
> static int st_lsm6dsx_read_event(struct iio_dev *iio_dev,
> @@ -2171,11 +2144,11 @@ st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw,
>
> switch (drdy_pin) {
> case 1:
> - hw->irq_routing = &hw->settings->irq_config.irq1_func;
> + hw->irq_routing = hw->settings->irq_config.irq1_func;
> *drdy_reg = &hw->settings->irq_config.irq1;
> break;
> case 2:
> - hw->irq_routing = &hw->settings->irq_config.irq2_func;
> + hw->irq_routing = hw->settings->irq_config.irq2_func;
> *drdy_reg = &hw->settings->irq_config.irq2;
> break;
> default:
> --
> 2.39.5
>
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