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Message-ID: <CAJF2gTQ2SLj0hhQ0PXYECd+soKGN0TNmx38sVpO0iN_mHEXyRQ@mail.gmail.com>
Date: Fri, 21 Nov 2025 16:23:52 +0800
From: Guo Ren <guoren@...nel.org>
To: cp0613@...ux.alibaba.com
Cc: robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, pjw@...nel.org,
palmer@...belt.com, aou@...s.berkeley.edu, peterz@...radead.org,
mingo@...hat.com, acme@...nel.org, namhyung@...nel.org, mark.rutland@....com,
alexander.shishkin@...ux.intel.com, jolsa@...nel.org, irogers@...gle.com,
adrian.hunter@...el.com, james.clark@...aro.org, devicetree@...r.kernel.org,
linux-perf-users@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/4] dt-bindings: riscv: Add XuanTie C930 CPU compatible
On Fri, Nov 21, 2025 at 2:35 PM <cp0613@...ux.alibaba.com> wrote:
>
> From: Chen Pei <cp0613@...ux.alibaba.com>
>
> Update Documentation for supporting XuanTie C930.
>
> Signed-off-by: Chen Pei <cp0613@...ux.alibaba.com>
> ---
> Documentation/devicetree/bindings/riscv/cpus.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
> index 153d0dac57fb..581a95eba932 100644
> --- a/Documentation/devicetree/bindings/riscv/cpus.yaml
> +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
> @@ -65,6 +65,7 @@ properties:
> - thead,c908
> - thead,c910
> - thead,c920
> + - xuantie,c930
Yes, c930 belongs to XuanTie, not T-HEAD.
Reviewed-by: Guo Ren (Alibaba Damo Academy) <guoren@...nel.org>
--
Best Regards
Guo Ren
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