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Message-Id: <20251121-glymur_llcc_enablement-v1-0-336b851b8dcb@oss.qualcomm.com>
Date: Fri, 21 Nov 2025 15:23:51 +0530
From: Pankaj Patil <pankaj.patil@....qualcomm.com>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>,
Conor Dooley <conor@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Pankaj Patil <pankaj.patil@....qualcomm.com>,
sibi.sankar@....qualcomm.com, rajendra.nayak@....qualcomm.com
Subject: [PATCH 0/4] soc: qcom: llcc: Add support for Glymur SoC
Glymur SoC uses the Last Level Cache Controller (LLCC) as its
system cache controller, update the device-tree bindings and
SCT configuration data in the LLCC driver.
Enabled additional use case IDs defined in
include/linux/soc/qcom/llcc-qcom.h:
OOBM_NS
OOBM_S
VIDSC_VSP1
PCIE_TCU
Signed-off-by: Pankaj Patil <pankaj.patil@....qualcomm.com>
---
Pankaj Patil (4):
dt-bindings: cache: qcom,llcc: Document Glymur LLCC block
soc: qcom: llcc: Enable additional usecase id for Glymur
soc: qcom: llcc: Fix usecase id macro alignment
soc: qcom: llcc-qcom: Add support for Glymur
.../devicetree/bindings/cache/qcom,llcc.yaml | 43 +++++
drivers/soc/qcom/llcc-qcom.c | 207 +++++++++++++++++++++
include/linux/soc/qcom/llcc-qcom.h | 152 +++++++--------
3 files changed, 328 insertions(+), 74 deletions(-)
---
base-commit: b179ce312bafcb8c68dc718e015aee79b7939ff0
change-id: 20251029-glymur_llcc_enablement-6a812c08f4c1
Best regards,
--
Pankaj Patil <pankaj.patil@....qualcomm.com>
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