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Message-ID: <40c930a4-2dc0-4fe1-b430-02ca05a1b517@kernel.org>
Date: Fri, 21 Nov 2025 11:35:30 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Pankaj Patil <pankaj.patil@....qualcomm.com>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Conor Dooley <conor@...nel.org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, sibi.sankar@....qualcomm.com,
rajendra.nayak@....qualcomm.com
Subject: Re: [PATCH 1/4] dt-bindings: cache: qcom,llcc: Document Glymur LLCC
block
On 21/11/2025 10:53, Pankaj Patil wrote:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,glymur-llcc
> + then:
> + properties:
> + reg:
> + items:
> + - description: LLCC0 base register region
> + - description: LLCC1 base register region
> + - description: LLCC2 base register region
> + - description: LLCC3 base register region
> + - description: LLCC4 base register region
> + - description: LLCC5 base register region
> + - description: LLCC6 base register region
> + - description: LLCC7 base register region
> + - description: LLCC8 base register region
> + - description: LLCC9 base register region
> + - description: LLCC10 base register region
> + - description: LLCC11 base register region
> + - description: LLCC broadcast base register region
> + - description: LLCC broadcast AND register region
Max is 10, so this is too many. You need to fix top-level constraints.
> + reg-names:
Best regards,
Krzysztof
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