[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20251121112626.1395565-2-cosmin-gabriel.tanislav.xa@renesas.com>
Date: Fri, 21 Nov 2025 13:26:19 +0200
From: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@...esas.com>
To: Geert Uytterhoeven <geert+renesas@...der.be>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Magnus Damm <magnus.damm@...il.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc: linux-renesas-soc@...r.kernel.org,
linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Cosmin Tanislav <cosmin-gabriel.tanislav.xa@...esas.com>
Subject: [PATCH 1/8] pinctrl: renesas: rzt2h: move GPIO enable/disable into separate function
GPIO is enabled or disabled in multiple places, simplify code by moving
this logic into a separate function.
Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@...esas.com>
---
drivers/pinctrl/renesas/pinctrl-rzt2h.c | 24 ++++++++++++++++--------
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/drivers/pinctrl/renesas/pinctrl-rzt2h.c b/drivers/pinctrl/renesas/pinctrl-rzt2h.c
index 4826ff91cd90..c8ca5e13bba7 100644
--- a/drivers/pinctrl/renesas/pinctrl-rzt2h.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzt2h.c
@@ -119,6 +119,19 @@ static int rzt2h_validate_pin(struct rzt2h_pinctrl *pctrl, unsigned int offset)
return (pincfg & BIT(pin)) ? 0 : -EINVAL;
}
+static void rzt2h_pinctrl_set_gpio_en(struct rzt2h_pinctrl *pctrl,
+ u8 port, u8 pin, bool en)
+{
+ u8 reg = rzt2h_pinctrl_readb(pctrl, port, PMC(port));
+
+ if (en)
+ reg &= ~BIT(pin);
+ else
+ reg |= BIT(pin);
+
+ rzt2h_pinctrl_writeb(pctrl, port, reg, PMC(port));
+}
+
static void rzt2h_pinctrl_set_pfc_mode(struct rzt2h_pinctrl *pctrl,
u8 port, u8 pin, u8 func)
{
@@ -133,8 +146,7 @@ static void rzt2h_pinctrl_set_pfc_mode(struct rzt2h_pinctrl *pctrl,
rzt2h_pinctrl_writew(pctrl, port, reg16, PM(port));
/* Temporarily switch to GPIO mode with PMC register */
- reg16 = rzt2h_pinctrl_readb(pctrl, port, PMC(port));
- rzt2h_pinctrl_writeb(pctrl, port, reg16 & ~BIT(pin), PMC(port));
+ rzt2h_pinctrl_set_gpio_en(pctrl, port, pin, true);
/* Select Pin function mode with PFC register */
reg64 = rzt2h_pinctrl_readq(pctrl, port, PFC(port));
@@ -142,8 +154,7 @@ static void rzt2h_pinctrl_set_pfc_mode(struct rzt2h_pinctrl *pctrl,
rzt2h_pinctrl_writeq(pctrl, port, reg64 | ((u64)func << (pin * 8)), PFC(port));
/* Switch to Peripheral pin function with PMC register */
- reg16 = rzt2h_pinctrl_readb(pctrl, port, PMC(port));
- rzt2h_pinctrl_writeb(pctrl, port, reg16 | BIT(pin), PMC(port));
+ rzt2h_pinctrl_set_gpio_en(pctrl, port, pin, false);
}
static int rzt2h_pinctrl_set_mux(struct pinctrl_dev *pctldev,
@@ -447,7 +458,6 @@ static int rzt2h_gpio_request(struct gpio_chip *chip, unsigned int offset)
u8 port = RZT2H_PIN_ID_TO_PORT(offset);
u8 bit = RZT2H_PIN_ID_TO_PIN(offset);
int ret;
- u8 reg;
ret = rzt2h_validate_pin(pctrl, offset);
if (ret)
@@ -460,9 +470,7 @@ static int rzt2h_gpio_request(struct gpio_chip *chip, unsigned int offset)
guard(spinlock_irqsave)(&pctrl->lock);
/* Select GPIO mode in PMC Register */
- reg = rzt2h_pinctrl_readb(pctrl, port, PMC(port));
- reg &= ~BIT(bit);
- rzt2h_pinctrl_writeb(pctrl, port, reg, PMC(port));
+ rzt2h_pinctrl_set_gpio_en(pctrl, port, bit, true);
return 0;
}
--
2.52.0
Powered by blists - more mailing lists