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Message-ID: <CA+zupgyEP+_q0uO1SpvR_wpk0ZP2EWf_E6FGQpOCLW63dKp5Fw@mail.gmail.com>
Date: Sat, 22 Nov 2025 17:31:56 +0800
From: Roy Luo <royluo@...gle.com>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
Philipp Zabel <p.zabel@...gutronix.de>, Peter Griffin <peter.griffin@...aro.org>,
André Draszik <andre.draszik@...aro.org>,
Tudor Ambarus <tudor.ambarus@...aro.org>, Joy Chakraborty <joychakr@...gle.com>,
Naveen Kumar <mnkumar@...gle.com>, Badhri Jagan Sridharan <badhri@...gle.com>,
Doug Anderson <dianders@...gle.com>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-usb@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org
Subject: Re: [PATCH v7 2/2] usb: dwc3: Add Google Tensor SoC DWC3 glue driver
On Fri, Nov 21, 2025 at 10:26 PM Greg Kroah-Hartman
<gregkh@...uxfoundation.org> wrote:
>
> On Wed, Nov 19, 2025 at 09:37:48AM +0000, Roy Luo wrote:
> > Add support for the DWC3 USB controller found on Google Tensor G5
> > (codename: laguna). The controller features dual-role functionality
> > and hibernation.
> >
> > The primary focus is implementing hibernation support in host mode,
> > enabling the controller to enter a low-power state (D3). This is
> > particularly relevant during system power state transition and
> > runtime power management for power efficiency.
> > Highlights:
> > - Align suspend callback with dwc3_suspend_common() for deciding
> > between a full teardown and hibernation in host mode.
> > - Integration with `psw` (power switchable) and `top` power domains,
> > managing their states and device links to support hibernation.
> > - A notifier callback dwc3_google_usb_psw_pd_notifier() for
> > `psw` power domain events to manage controller state
> > transitions to/from D3.
> > - Coordination of the `non_sticky` reset during power state
> > transitions, asserting it on D3 entry and deasserting on D0 entry
> > in hibernation scenario.
> > - Handling of high-speed and super-speed PME interrupts
> > that are generated by remote wakeup during hibernation.
> >
> > Acked-by: Thinh Nguyen <Thinh.Nguyen@...opsys.com>
> > Co-developed-by: Joy Chakraborty <joychakr@...gle.com>
> > Signed-off-by: Joy Chakraborty <joychakr@...gle.com>
> > Co-developed-by: Naveen Kumar <mnkumar@...gle.com>
> > Signed-off-by: Naveen Kumar <mnkumar@...gle.com>
> > Signed-off-by: Roy Luo <royluo@...gle.com>
> > ---
> > drivers/usb/dwc3/Kconfig | 10 +
> > drivers/usb/dwc3/Makefile | 1 +
> > drivers/usb/dwc3/dwc3-google.c | 628 +++++++++++++++++++++++++++++++++
> > 3 files changed, 639 insertions(+)
> > create mode 100644 drivers/usb/dwc3/dwc3-google.c
> >
> > diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
> > index 4925d15084f8..bb0e4dc97da3 100644
> > --- a/drivers/usb/dwc3/Kconfig
> > +++ b/drivers/usb/dwc3/Kconfig
> > @@ -200,4 +200,14 @@ config USB_DWC3_GENERIC_PLAT
> > the dwc3 child node in the device tree.
> > Say 'Y' or 'M' here if your platform integrates DWC3 in a similar way.
> >
> > +config USB_DWC3_GOOGLE
> > + tristate "Google Platform"
> > + depends on OF && COMMON_CLK && RESET_CONTROLLER
>
> No build testing?
Will add depends on COMPILE_TEST.
>
> > + default n
>
> This is always the default, no need to list it here.
Will drop it.
>
> > + help
> > + Support the DesignWare Core USB3 IP found on Google Tensor
> > + SoCs, starting with the G5 generation. This driver includes
> > + support for hibernation in host mode.
> > + Say 'Y' or 'M' if you have one such device.
>
> You forgot the module name :(
>
> > +#define to_dwc3_google(d) container_of((d), struct dwc3_google, dwc)
>
> container_of_const() please.
Ack, will fix it in the next version.
>
>
> thanks,
>
> greg k-h
Thanks for the review.
Regards,
Roy Luo
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