linux-kernel - RE: [PATCH v3 09/13] serial: sh-sci: Add support for RZ/G3E RSCI clks

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID:
 <TY3PR01MB11346B7E2793EE439BD5821C786D2A@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Date: Sat, 22 Nov 2025 16:50:09 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: geert <geert@...ux-m68k.org>, biju.das.au <biju.das.au@...il.com>
CC: Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Jiri Slaby
	<jirislaby@...nel.org>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski
	<krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, magnus.damm
	<magnus.damm@...il.com>, wsa+renesas <wsa+renesas@...g-engineering.com>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-serial@...r.kernel.org" <linux-serial@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>
Subject: RE: [PATCH v3 09/13] serial: sh-sci: Add support for RZ/G3E RSCI clks

Hi Geert,

Thanks for the feedback.

> -----Original Message-----
> From: Geert Uytterhoeven <geert@...ux-m68k.org>
> Sent: 21 November 2025 16:39
> Subject: Re: [PATCH v3 09/13] serial: sh-sci: Add support for RZ/G3E RSCI clks
> 
> Hi Biju,
> 
> On Fri, 14 Nov 2025 at 11:52, Biju <biju.das.au@...il.com> wrote:
> > From: Biju Das <biju.das.jz@...renesas.com>
> >
> > RZ/G3E RSCI has 6 clocks (5 module clocks + 1 external clock). Add
> > support for the module clocks.
> >
> > Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
> 
> Thanks for your patch!
> 
> > --- a/drivers/tty/serial/sh-sci-common.h
> > +++ b/drivers/tty/serial/sh-sci-common.h
> > @@ -17,6 +17,9 @@ enum SCI_CLKS {
> >         SCI_SCK,                /* Optional External Clock */
> >         SCI_BRG_INT,            /* Optional BRG Internal Clock Source */
> >         SCI_SCIF_CLK,           /* Optional BRG External Clock Source */
> > +       SCI_FCK_DIV64,          /* Optional Functional Clock frequency-divided by 64 */
> > +       SCI_FCK_DIV16,          /* Optional Functional Clock frequency-divided by 16 */
> > +       SCI_FCK_DIV4,           /* Optional Functional Clock frequency-divided by 4 */
> 
> Perhaps reverse the order?

OK.

> 
> >         SCI_NUM_CLKS
> >  };
> >
> > diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
> > index 2da36e8ce555..3b03d3d3f2c7 100644
> > --- a/drivers/tty/serial/sh-sci.c
> > +++ b/drivers/tty/serial/sh-sci.c
> > @@ -3172,6 +3172,9 @@ static int sci_init_clocks(struct sci_port *sci_port, struct device *dev)
> >                 [SCI_SCK] = "sck",
> >                 [SCI_BRG_INT] = "brg_int",
> >                 [SCI_SCIF_CLK] = "scif_clk",
> > +               [SCI_FCK_DIV64] = "tclk_div64",
> > +               [SCI_FCK_DIV16] = "tclk_div16",
> > +               [SCI_FCK_DIV4] = "tclk_div4",
> 
> Likewise
OK.
> 
> >         };
> >         struct clk *clk;
> >         unsigned int i;
> > @@ -3181,6 +3184,9 @@ static int sci_init_clocks(struct sci_port *sci_port, struct device *dev)
> >         } else if (sci_port->type == SCI_PORT_RSCI) {
> >                 clk_names[SCI_FCK] = "operation";
> >                 clk_names[SCI_BRG_INT] = "bus";
> > +       } else if (sci_port->type == RSCI_PORT_SCI || sci_port->type == RSCI_PORT_SCIF) {
> > +               clk_names[SCI_FCK] = "tclk";
> > +               clk_names[SCI_BRG_INT] = "bus";
> 
> pclk?
OK.

> 
> >         }
> >
> >         for (i = 0; i < SCI_NUM_CLKS; i++) { @@ -3194,6 +3200,12 @@
> > static int sci_init_clocks(struct sci_port *sci_port, struct device *dev)
> >                     (i == SCI_FCK || i == SCI_BRG_INT))
> >                         return dev_err_probe(dev, -ENODEV, "failed to
> > get %s\n", name);
> >
> > +               if (!clk && (sci_port->type == RSCI_PORT_SCI ||
> > +                            sci_port->type == RSCI_PORT_SCIF) &&
> > +                   (i == SCI_FCK || i == SCI_BRG_INT || i == SCI_FCK_DIV64 ||
> > +                    i == SCI_FCK_DIV16 || i == SCI_FCK_DIV4))
> > +                       return dev_err_probe(dev, -ENODEV, "failed to
> > + get %s\n", name);
> > +
> >                 if (!clk && i == SCI_FCK) {
> >                         /*
> >                          * Not all SH platforms declare a clock lookup
> > entry
> 
> This function is becoming a bit cumbersome.
> Can it be simplified?
> Can we avoid looking up clocks that are not relevant for the port?

OK will fix this in next version.

Cheers,
Biju