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Message-ID: <32ffb736-d060-4ae9-b4fb-b836a6c869e9@kernel.org>
Date: Sun, 23 Nov 2025 14:23:45 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@...esas.com>,
Thomas Gleixner <tglx@...utronix.de>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>
Cc: linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-renesas-soc@...r.kernel.org
Subject: Re: [PATCH 1/4] dt-bindings: interrupt-controller: document
RZ/{T2H,N2H} ICU
On 21/11/2025 12:14, Cosmin Tanislav wrote:
> +properties:
> + compatible:
> + oneOf:
> + - const: renesas,r9a09g077-icu # RZ/T2H
> +
> + - items:
> + - enum:
> + - renesas,r9a09g087-icu # RZ/N2H
> + - const: renesas,r9a09g077-icu
> +
> + '#interrupt-cells':
> + description: The first cell is the SPI number of the interrupt, as per user
> + manual. The second cell is used to specify the flag.
> + const: 2
> +
> + '#address-cells':
> + const: 0
> +
> + interrupt-controller: true
> +
> + reg:
> + items:
> + - description: Non-safety registers (INTCPU0-13, IRQ0-13)
> + - description: Safety registers (INTCPU14-15, IRQ14-15, SEI)
reg is always the second property. Please follow DTS coding style.
> +
> + interrupts:
> + items:
> + - description: Software interrupt 0
> + - description: Software interrupt 1
> + - description: Software interrupt 2
> + - description: Software interrupt 3
> + - description: Software interrupt 4
> + - description: Software interrupt 5
> + - description: Software interrupt 6
> + - description: Software interrupt 7
> + - description: Software interrupt 8
> + - description: Software interrupt 9
> + - description: Software interrupt 10
> + - description: Software interrupt 11
> + - description: Software interrupt 12
> + - description: Software interrupt 13
> + - description: Software interrupt 14
> + - description: Software interrupt 15
> + - description: External pin interrupt 0
> + - description: External pin interrupt 1
> + - description: External pin interrupt 2
> + - description: External pin interrupt 3
> + - description: External pin interrupt 4
> + - description: External pin interrupt 5
> + - description: External pin interrupt 6
> + - description: External pin interrupt 7
> + - description: External pin interrupt 8
> + - description: External pin interrupt 9
> + - description: External pin interrupt 10
> + - description: External pin interrupt 11
> + - description: External pin interrupt 12
> + - description: External pin interrupt 13
> + - description: External pin interrupt 14
> + - description: External pin interrupt 15
> + - description: System error interrupt
> + - description: Cortex-A55 error event 0
> + - description: Cortex-A55 error event 1
> + - description: Cortex-R52 CPU 0 error event 0
> + - description: Cortex-R52 CPU 0 error event 1
> + - description: Cortex-R52 CPU 1 error event 0
> + - description: Cortex-R52 CPU 1 error event 1
> + - description: Peripherals error event 0
> + - description: Peripherals error event 1
> + - description: DSMIF error event 0
> + - description: DSMIF error event 1
> + - description: ENCIF error event 0
> + - description: ENCIF error event 1
> +
> + interrupt-names:
> + items:
> + - const: intcpu0
> + - const: intcpu1
> + - const: intcpu2
> + - const: intcpu3
> + - const: intcpu4
> + - const: intcpu5
> + - const: intcpu6
> + - const: intcpu7
> + - const: intcpu8
> + - const: intcpu9
> + - const: intcpu10
> + - const: intcpu11
> + - const: intcpu12
> + - const: intcpu13
> + - const: intcpu14
> + - const: intcpu15
> + - const: irq0
> + - const: irq1
> + - const: irq2
> + - const: irq3
> + - const: irq4
> + - const: irq5
> + - const: irq6
> + - const: irq7
> + - const: irq8
> + - const: irq9
> + - const: irq10
> + - const: irq11
> + - const: irq12
> + - const: irq13
> + - const: irq14
> + - const: irq15
> + - const: sei
> + - const: ca55-err0
> + - const: ca55-err1
> + - const: cr520-err0
> + - const: cr520-err1
> + - const: cr521-err0
> + - const: cr521-err1
> + - const: peri-err0
> + - const: peri-err1
> + - const: dsmif-err0
> + - const: dsmif-err1
> + - const: encif-err0
> + - const: encif-err1
Why all the interrupt names have nothing in common with previous ICU
(renesas,rzv2h-icu.yaml)? These names are supposed to share, not
re-invent every time the name.
Isn't external interrupt the same as GPIO interrupt? How do they differ
for this particular device?
And "Error interrupt to CA55" is "icu-error-ca55", but here THE SAME is
called "ca55-err0"?
No, please start using unified naming, not re-inventing this every time.
Order also is supposed to follow older generation, so bindings share
common parts.
> +
> + clocks:
> + maxItems: 1
> +
> + power-domains:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - '#interrupt-cells'
> + - '#address-cells'
> + - interrupt-controller
> + - interrupts
> + - interrupt-names
> + - clocks
> + - power-domains
Best regards,
Krzysztof
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