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Message-ID: <CAAhSdy2Y=qk27Khy+fzOCidop7+tNqoDb0CFwAJ_p090NV46vQ@mail.gmail.com>
Date: Sun, 23 Nov 2025 10:52:46 +0530
From: Anup Patel <anup@...infault.org>
To: fangyu.yu@...ux.alibaba.com
Cc: atish.patra@...ux.dev, pjw@...nel.org, palmer@...belt.com,
aou@...s.berkeley.edu, alex@...ti.fr, guoren@...nel.org,
ajones@...tanamicro.com, kvm@...r.kernel.org, kvm-riscv@...ts.infradead.org,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3] RISC-V: KVM: Fix guest page fault within HLV* instructions
On Fri, Nov 21, 2025 at 7:06 PM <fangyu.yu@...ux.alibaba.com> wrote:
>
> From: Fangyu Yu <fangyu.yu@...ux.alibaba.com>
>
> When executing HLV* instructions at the HS mode, a guest page fault
> may occur when a g-stage page table migration between triggering the
> virtual instruction exception and executing the HLV* instruction.
>
> This may be a corner case, and one simpler way to handle this is to
> re-execute the instruction where the virtual instruction exception
> occurred, and the guest page fault will be automatically handled.
>
> Fixes: b91f0e4cb8a3 ("RISC-V: KVM: Factor-out instruction emulation into separate sources")
> Signed-off-by: Fangyu Yu <fangyu.yu@...ux.alibaba.com>
LGTM.
Reviewed-by: Anup Patel <anup@...infault.org>
Queued this patch for Linux-6.19
Regards,
Anup
>
> ---
> Changes in v3:
> - Add a helper function to avoid repeating the same paragraph(suggested by drew)
> - Link to v2: https://lore.kernel.org/linux-riscv/20251111135506.8526-1-fangyu.yu@linux.alibaba.com/
>
> Changes in v2:
> - Remove unnecessary modifications and add comments(suggested by Anup)
> - Update Fixes tag
> - Link to v1: https://lore.kernel.org/linux-riscv/20250912134332.22053-1-fangyu.yu@linux.alibaba.com/
> ---
> arch/riscv/kvm/vcpu_insn.c | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/arch/riscv/kvm/vcpu_insn.c b/arch/riscv/kvm/vcpu_insn.c
> index de1f96ea6225..4d89b94128ae 100644
> --- a/arch/riscv/kvm/vcpu_insn.c
> +++ b/arch/riscv/kvm/vcpu_insn.c
> @@ -298,6 +298,22 @@ static int system_opcode_insn(struct kvm_vcpu *vcpu, struct kvm_run *run,
> return (rc <= 0) ? rc : 1;
> }
>
> +static bool is_load_guest_page_fault(unsigned long scause)
> +{
> + /**
> + * If a g-stage page fault occurs, the direct approach
> + * is to let the g-stage page fault handler handle it
> + * naturally, however, calling the g-stage page fault
> + * handler here seems rather strange.
> + * Considering this is a corner case, we can directly
> + * return to the guest and re-execute the same PC, this
> + * will trigger a g-stage page fault again and then the
> + * regular g-stage page fault handler will populate
> + * g-stage page table.
> + */
> + return (scause == EXC_LOAD_GUEST_PAGE_FAULT);
> +}
> +
> /**
> * kvm_riscv_vcpu_virtual_insn -- Handle virtual instruction trap
> *
> @@ -323,6 +339,8 @@ int kvm_riscv_vcpu_virtual_insn(struct kvm_vcpu *vcpu, struct kvm_run *run,
> ct->sepc,
> &utrap);
> if (utrap.scause) {
> + if (is_load_guest_page_fault(utrap.scause))
> + return 1;
> utrap.sepc = ct->sepc;
> kvm_riscv_vcpu_trap_redirect(vcpu, &utrap);
> return 1;
> @@ -378,6 +396,8 @@ int kvm_riscv_vcpu_mmio_load(struct kvm_vcpu *vcpu, struct kvm_run *run,
> insn = kvm_riscv_vcpu_unpriv_read(vcpu, true, ct->sepc,
> &utrap);
> if (utrap.scause) {
> + if (is_load_guest_page_fault(utrap.scause))
> + return 1;
> /* Redirect trap if we failed to read instruction */
> utrap.sepc = ct->sepc;
> kvm_riscv_vcpu_trap_redirect(vcpu, &utrap);
> @@ -504,6 +524,8 @@ int kvm_riscv_vcpu_mmio_store(struct kvm_vcpu *vcpu, struct kvm_run *run,
> insn = kvm_riscv_vcpu_unpriv_read(vcpu, true, ct->sepc,
> &utrap);
> if (utrap.scause) {
> + if (is_load_guest_page_fault(utrap.scause))
> + return 1;
> /* Redirect trap if we failed to read instruction */
> utrap.sepc = ct->sepc;
> kvm_riscv_vcpu_trap_redirect(vcpu, &utrap);
> --
> 2.50.1
>
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