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Message-Id: <20251124-trng_dt_binding_x1e80100-v1-2-b4eafa0f1077@oss.qualcomm.com>
Date: Mon, 24 Nov 2025 22:38:50 +0530
From: Harshal Dev <harshal.dev@....qualcomm.com>
To: Herbert Xu <herbert@...dor.apana.org.au>,
"David S. Miller" <davem@...emloft.net>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Vinod Koul <vkoul@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-crypto@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Harshal Dev <harshal.dev@....qualcomm.com>
Subject: [PATCH 2/2] arm64: dts: qcom: x1e80100: add TRNG node
The x1e80100 SoC has a True Random Number Generator, add the node with
the correct compatible set.
Signed-off-by: Harshal Dev <harshal.dev@....qualcomm.com>
---
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 51576d9c935d..c17c02c347be 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -3033,6 +3033,11 @@ usb_1_ss2_qmpphy_dp_in: endpoint {
};
};
+ rng: rng@...3000 {
+ compatible = "qcom,x1e80100-trng", "qcom,trng";
+ reg = <0x0 0x10c3000 0x0 0x1000>;
+ };
+
cnoc_main: interconnect@...0000 {
compatible = "qcom,x1e80100-cnoc-main";
reg = <0 0x01500000 0 0x14400>;
--
2.25.1
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