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Message-ID: <20251124230333.GM153257@nvidia.com>
Date: Mon, 24 Nov 2025 19:03:33 -0400
From: Jason Gunthorpe <jgg@...dia.com>
To: Nicolin Chen <nicolinc@...dia.com>
Cc: Will Deacon <will@...nel.org>, jean-philippe@...aro.org,
	robin.murphy@....com, joro@...tes.org, balbirs@...dia.com,
	miko.lenczewski@....com, peterz@...radead.org, kevin.tian@...el.com,
	praan@...gle.com, linux-arm-kernel@...ts.infradead.org,
	iommu@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 3/7] iommu/arm-smmu-v3: Introduce a per-domain
 arm_smmu_invs array

On Mon, Nov 24, 2025 at 02:41:15PM -0800, Nicolin Chen wrote:
> On Mon, Nov 24, 2025 at 09:42:31PM +0000, Will Deacon wrote:
> > On Sat, Nov 08, 2025 at 12:08:04AM -0800, Nicolin Chen wrote:
> 
> > > +EXPORT_SYMBOL_IF_KUNIT(arm_smmu_invs_merge);
> > 
> > There's nothing really SMMU-specific about this data structure manipulation.
> > Do you think we can abstract the invalidation array concept into a library
> > which other IOMMU drivers could use too?
> 
> Yea, I am trying to shift to that at this moment, hopefully to
> combine the iotlb tag (asid/vmid) allocation as well. We do see
> it could be quite useful in AMD driver already.

I do want to see this, but also without doing work on the other
drivers to integrate something it will be hard to design.

My preference is to get the basic system agreed here in ARM and then
move to a generalization. There is quite a bit of work needed in the
other drivers before they could use it - which makes me worry it might
never happen anyhow. riscv is probably the closest, followed by intel.

Alternatively we could try to just move it as is to a little library
without pushing for any generalization at this moment.

Jason

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