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Message-ID: <aSToANNpeb5GxBP7@Asurada-Nvidia>
Date: Mon, 24 Nov 2025 15:19:28 -0800
From: Nicolin Chen <nicolinc@...dia.com>
To: Jason Gunthorpe <jgg@...dia.com>
CC: Will Deacon <will@...nel.org>, <jean-philippe@...aro.org>,
<robin.murphy@....com>, <joro@...tes.org>, <balbirs@...dia.com>,
<miko.lenczewski@....com>, <peterz@...radead.org>, <kevin.tian@...el.com>,
<praan@...gle.com>, <linux-arm-kernel@...ts.infradead.org>,
<iommu@...ts.linux.dev>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 5/7] iommu/arm-smmu-v3: Populate smmu_domain->invs
when attaching masters
On Mon, Nov 24, 2025 at 07:13:41PM -0400, Jason Gunthorpe wrote:
> On Mon, Nov 24, 2025 at 09:43:18PM +0000, Will Deacon wrote:
> > > + /*
> > > + * We are committed to updating the STE. Ensure the invalidation array
> > > + * is visable to concurrent map/unmap threads, and acquire any racying
> > > + * IOPTE updates.
> > > + */
> > > + smp_mb();
> >
> > Sorry, but the comment hasn't really helped me here. We're ordering the
> > publishing of the invalidation array above before ... what?
>
> "concurrent map/unmap threads" means other threads calling
> arm_smmu_iotlb_sync().. I think the matching comment describing this
> and introducing the pair'd smp_mb() is in a later patch.
...
> Nicolin maybe this barrier line should be moved to be added in the
> patch that add's the pair'd barrier and description?
Sure. I can move that to PATCH-6.
Thanks
Nicolin
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