linux-kernel - [PATCH 1/3] perf/x86/msr: Add Airmont NP

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Message-ID: <20251124074846.9653-2-ms@dev.tdt.de>
Date: Mon, 24 Nov 2025 08:48:44 +0100
From: Martin Schiller <ms@....tdt.de>
To: tony.luck@...el.com, peterz@...radead.org, mingo@...hat.com,
	acme@...nel.org, namhyung@...nel.org, mark.rutland@....com,
	alexander.shishkin@...ux.intel.com, jolsa@...nel.org,
	irogers@...gle.com, adrian.hunter@...el.com, james.clark@...aro.org,
	tglx@...utronix.de, bp@...en8.de, dave.hansen@...ux.intel.com
Cc: x86@...nel.org, hpa@...or.com, linux-perf-users@...r.kernel.org,
	linux-kernel@...r.kernel.org, fe@....tdt.de,
	Martin Schiller <ms@....tdt.de>
Subject: [PATCH 1/3] perf/x86/msr: Add Airmont NP

Like Airmont, the Airmont NP (aka Intel / MaxLinear Lightning Mountain)
supports SMI_COUNT MSR.

Signed-off-by: Martin Schiller <ms@....tdt.de>
---
 arch/x86/events/msr.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index 7f5007a4752a..8052596b8503 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -78,6 +78,7 @@ static bool test_intel(int idx, void *data)
 	case INTEL_ATOM_SILVERMONT:
 	case INTEL_ATOM_SILVERMONT_D:
 	case INTEL_ATOM_AIRMONT:
+	case INTEL_ATOM_AIRMONT_NP:
 
 	case INTEL_ATOM_GOLDMONT:
 	case INTEL_ATOM_GOLDMONT_D:
-- 
2.47.3