linux-kernel - Re: [PATCH v3 2/2] riscv: dts: starfive: add Orange Pi RV

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Message-ID: <20251124-blaming-duplicity-fb1311864b3f@spud>
Date: Mon, 24 Nov 2025 11:07:35 +0000
From: Conor Dooley <conor@...nel.org>
To: E Shattow <e@...eshell.de>
Cc: Emil Renner Berthing <kernel@...il.dk>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Paul Walmsley <pjw@...nel.org>, Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>,
	linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
	devicetree@...r.kernel.org, Icenowy Zheng <uwu@...nowy.me>,
	Conor Dooley <conor+dt@...nel.org>
Subject: Re: [PATCH v3 2/2] riscv: dts: starfive: add Orange Pi RV

On Sun, Nov 23, 2025 at 02:50:45PM -0800, E Shattow wrote:
> From: Icenowy Zheng <uwu@...nowy.me>
> 
> Orange Pi RV is a SBC based on the StarFive VisionFive 2 board.
> 
> Orange Pi RV features:
> 
> - StarFive JH7110 SoC
> - GbE port connected to JH7110 GMAC0 via YT8531 PHY
> - 4x USB ports via VL805 PCIe USB controller connected to JH7110 pcie0
> - M.2 M-key slot connected to JH7110 pcie1
> - HDMI video output
> - 3.5mm audio output
> - Ampak AP6256 SDIO Wi-Fi/Bluetooth module on mmc0
> - microSD slot on mmc1
> - SPI NOR flash memory
> - 24c02 EEPROM (read only by default)
> 
> Signed-off-by: Icenowy Zheng <uwu@...nowy.me>
> Signed-off-by: E Shattow <e@...eshell.de>
> ---
>  arch/riscv/boot/dts/starfive/Makefile         |  1 +
>  .../boot/dts/starfive/jh7110-orangepi-rv.dts  | 76 +++++++++++++++++++
>  2 files changed, 77 insertions(+)
>  create mode 100644 arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
> 
> diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
> index 62b659f89ba7..d34c8c79bc10 100644
> --- a/arch/riscv/boot/dts/starfive/Makefile
> +++ b/arch/riscv/boot/dts/starfive/Makefile
> @@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-deepcomputing-fml13v01.dtb
>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-marscm-emmc.dtb
>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-marscm-lite.dtb
> +dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-orangepi-rv.dtb
>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-pine64-star64.dtb
>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts b/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
> new file mode 100644
> index 000000000000..16ec2767134e
> --- /dev/null
> +++ b/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
> @@ -0,0 +1,76 @@
> +// SPDX-License-Identifier: GPL-2.0 OR MIT
> +/*
> + * Copyright (C) 2025 Icenowy Zheng <uwu@...nowy.me>
> + */
> +
> +/dts-v1/;
> +#include "jh7110-common.dtsi"
> +
> +/ {
> +	model = "Xunlong Orange Pi RV";
> +	compatible = "xunlong,orangepi-rv", "starfive,jh7110";
> +
> +	/* This regulator is always on by hardware */
> +	reg_vcc3v3_pcie: regulator-vcc3v3-pcie {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vcc3v3-pcie";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		regulator-always-on;
> +	};
> +
> +	wifi_pwrseq: wifi-pwrseq {
> +		compatible = "mmc-pwrseq-simple";
> +		reset-gpios = <&sysgpio 62 GPIO_ACTIVE_LOW>;
> +	};
> +};
> +
> +&gmac0 {
> +	assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
> +	assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
> +	starfive,tx-use-rgmii-clk;
> +	status = "okay";
> +};
> +
> +&mmc0 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	cap-sd-highspeed;
> +	mmc-pwrseq = <&wifi_pwrseq>;
> +	vmmc-supply = <&reg_vcc3v3_pcie>;
> +	vqmmc-supply = <&vcc_3v3>;
> +	status = "okay";
> +
> +	ap6256: wifi@1 {
> +		compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-fmac";
> +		reg = <1>;
> +		/* TODO: out-of-band IRQ on GPIO21 */

What's up with this TODO? Why's the gpio not here? Missing binding
support, missing driver support?

> +	};
> +};
> +
> +&mmc1 {
> +	cd-gpios = <&sysgpio 41 GPIO_ACTIVE_HIGH>;
> +};
> +
> +&pcie0 {
> +	status = "okay";
> +};
> +
> +&pcie1 {
> +	status = "okay";
> +};
> +
> +&phy0 {
> +	rx-internal-delay-ps = <1500>;
> +	tx-internal-delay-ps = <1500>;
> +	motorcomm,rx-clk-drv-microamp = <3970>;
> +	motorcomm,rx-data-drv-microamp = <2910>;
> +	motorcomm,tx-clk-adj-enabled;
> +	motorcomm,tx-clk-10-inverted;
> +	motorcomm,tx-clk-100-inverted;
> +	motorcomm,tx-clk-1000-inverted;
> +};
> +
> +&pwmdac {
> +	status = "okay";
> +};
> -- 
> 2.50.0
> 

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