linux-kernel - Re: [PATCH v3 3/5] thermal/drivers: airoha: Generalize get_thermal_ADC and set

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Message-ID: <ad124b26-7c59-4c31-8e45-7eca0001d6a2@linaro.org>
Date: Tue, 25 Nov 2025 22:20:17 +0100
From: Daniel Lezcano <daniel.lezcano@...aro.org>
To: Christian Marangi <ansuelsmth@...il.com>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, "Rafael J. Wysocki" <rafael@...nel.org>,
 Zhang Rui <rui.zhang@...el.com>, Lukasz Luba <lukasz.luba@....com>,
 Lorenzo Bianconi <lorenzo@...nel.org>, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org
Subject: Re: [PATCH v3 3/5] thermal/drivers: airoha: Generalize
 get_thermal_ADC and set_mux function

On 11/6/25 23:59, Christian Marangi wrote:
> In preparation for support of Airoha AN7583, generalize
> get_thermal_ADC() and set_thermal_mux() with the use of reg_field API.
> 
> This is to account the same logic between the current supported SoC and
> the new one but with different register address.
> 
> While at it also further improve some comments and move sleep inside the
> set_thermal_mux function.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
> ---
>   drivers/thermal/airoha_thermal.c | 54 +++++++++++++++++++++++++-------
>   1 file changed, 42 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/thermal/airoha_thermal.c b/drivers/thermal/airoha_thermal.c
> index 864a01fd8fd8..a062922cb116 100644
> --- a/drivers/thermal/airoha_thermal.c
> +++ b/drivers/thermal/airoha_thermal.c
> @@ -193,9 +193,18 @@
>   
>   #define AIROHA_MAX_SAMPLES			6
>   
> +enum airoha_thermal_chip_scu_field {
> +	AIROHA_THERMAL_DOUT_TADC,
> +	AIROHA_THERMAL_MUX_TADC,
> +
> +	/* keep last */
> +	AIROHA_THERMAL_FIELD_MAX,

nit: if last, no comma :)
nit2: naming is not consistent

> +};
> +
>   struct airoha_thermal_priv {
>   	struct regmap *map;
>   	struct regmap *chip_scu;
> +	struct regmap_field *chip_scu_fields[AIROHA_THERMAL_FIELD_MAX];
>   	struct resource scu_adc_res;
>   
>   	u32 pllrg_protect;
> @@ -219,22 +228,29 @@ static int airoha_get_thermal_ADC(struct airoha_thermal_priv *priv)
>   {
>   	u32 val;
>   
> -	regmap_read(priv->chip_scu, EN7581_DOUT_TADC, &val);
> -	return FIELD_GET(EN7581_DOUT_TADC_MASK, val);
> +	regmap_field_read(priv->chip_scu_fields[AIROHA_THERMAL_DOUT_TADC],
> +			  &val);
> +	return val;
>   }
>   
> -static void airoha_init_thermal_ADC_mode(struct airoha_thermal_priv *priv)
> +static void airoha_set_thermal_mux(struct airoha_thermal_priv *priv,
> +				   int tdac_idx)
>   {
> -	u32 adc_mux, pllrg;
> +	u32 pllrg;
>   
>   	/* Save PLLRG current value */
>   	regmap_read(priv->chip_scu, EN7581_PLLRG_PROTECT, &pllrg);
>   
> -	/* Give access to thermal regs */
> +	/* Give access to Thermal regs */
>   	regmap_write(priv->chip_scu, EN7581_PLLRG_PROTECT,
>   		     priv->pllrg_protect);
> -	adc_mux = FIELD_PREP(EN7581_MUX_TADC, EN7581_SCU_THERMAL_MUX_DIODE1);
> -	regmap_write(priv->chip_scu, EN7581_PWD_TADC, adc_mux);
> +
> +	/* Configure Thermal ADC mux to tdac_idx */
> +	regmap_field_write(priv->chip_scu_fields[AIROHA_THERMAL_MUX_TADC],
> +			   tdac_idx);
> +
> +	/* Sleep 10 ms for Thermal ADC to enable */
> +	usleep_range(10 * USEC_PER_MSEC, 11 * USEC_PER_MSEC);

10ms ? It is a lot no ?
>   	/* Restore PLLRG value on exit */
>   	regmap_write(priv->chip_scu, EN7581_PLLRG_PROTECT, pllrg);
> @@ -343,10 +359,8 @@ static void en7581_thermal_setup_adc_val(struct device *dev,
>   {
>   	u32 efuse_calib_info, cpu_sensor;
>   
> -	/* Setup thermal sensor to ADC mode and setup the mux to DIODE1 */
> -	airoha_init_thermal_ADC_mode(priv);
> -	/* sleep 10 ms for ADC to enable */
> -	usleep_range(10 * USEC_PER_MSEC, 11 * USEC_PER_MSEC);
> +	/* Setup Thermal Sensor to ADC mode and setup the mux to DIODE1 */
> +	airoha_set_thermal_mux(priv, EN7581_SCU_THERMAL_MUX_DIODE1);
>   
>   	regmap_read(priv->map, EN7581_EFUSE_TEMP_OFFSET_REG, &efuse_calib_info);
>   	if (efuse_calib_info) {
> @@ -429,13 +443,18 @@ static const struct regmap_config en7581_thermal_regmap_config = {
>   	.val_bits		= 32,
>   };
>   
> +static const struct reg_field en7581_chip_scu_fields[AIROHA_THERMAL_FIELD_MAX] = {
> +	[AIROHA_THERMAL_DOUT_TADC] = REG_FIELD(EN7581_DOUT_TADC, 0, 15),
> +	[AIROHA_THERMAL_MUX_TADC] = REG_FIELD(EN7581_PWD_TADC, 1, 3),
> +};
> +
>   static int en7581_thermal_probe(struct platform_device *pdev,
>   				struct airoha_thermal_priv *priv)
>   {
>   	struct device_node *chip_scu_np;
>   	struct device *dev = &pdev->dev;
>   	void __iomem *base;
> -	int irq, ret;
> +	int i, irq, ret;
>   
>   	base = devm_platform_ioremap_resource(pdev, 0);
>   	if (IS_ERR(base))
> @@ -454,6 +473,17 @@ static int en7581_thermal_probe(struct platform_device *pdev,
>   	if (IS_ERR(priv->chip_scu))
>   		return PTR_ERR(priv->chip_scu);
>   
> +	for (i = 0; i < AIROHA_THERMAL_FIELD_MAX; i++) {
> +		struct regmap_field *field;
> +
> +		field = devm_regmap_field_alloc(dev, priv->chip_scu,
> +						en7581_chip_scu_fields[i]);
> +		if (IS_ERR(field))
> +			return PTR_ERR(field);
> +
> +		priv->chip_scu_fields[i] = field;
> +	}
> +
>   	of_address_to_resource(chip_scu_np, 0, &priv->scu_adc_res);
>   	of_node_put(chip_scu_np);
>   


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