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Message-ID: <46765613-9a04-454b-8555-21f6fd965008@redhat.com>
Date: Tue, 25 Nov 2025 11:05:06 +0100
From: Paolo Abeni <pabeni@...hat.com>
To: Wei Fang <wei.fang@....com>, claudiu.manoil@....com,
vladimir.oltean@....com, xiaoning.wang@....com, andrew+netdev@...n.ch,
davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org
Cc: aziz.sellami@....com, imx@...ts.linux.dev, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 net-next 3/3] net: enetc: update the base address of
port MDIO registers for ENETC v4
On 11/19/25 11:25 AM, Wei Fang wrote:
> Each ENETC has a set of external MDIO registers to access its external
> PHY based on its port EMDIO bus, these registers are used for MDIO bus
> access, such as setting the PHY address, PHY register address and value,
> read or write operations, C22 or C45 format, etc. The base address of
> this set of registers has been modified in ENETC v4 and is different
> from that in ENETC v1. So the base address needs to be updated so that
> ENETC v4 can use port MDIO to manage its own external PHY.
>
> Additionally, if ENETC has the PCS layer, it also has a set of internal
> MDIO registers for managing its on-die PHY (PCS/Serdes). The base address
> of this set of registers is also different from that of ENETC v1, so the
> base address also needs to be updated so that ENETC v4 can support the
> management of on-die PHY through the internal MDIO bus.
>
> Signed-off-by: Wei Fang <wei.fang@....com>
Andrew, it's not clear to me if you are with the current patch version,
could you please chime-in?
Thanks,
Paolo
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