lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1f671fbb-233d-45e5-80f5-bb66049cadf6@0la.ch>
Date: Wed, 26 Nov 2025 15:22:34 +0100
From: Yaroslav <iam@....ch>
To: Jani Nikula <jani.nikula@...ux.intel.com>, Yaroslav Bolyukin
 <iam@...h.pw>, Ville Syrjälä
 <ville.syrjala@...ux.intel.com>,
 Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
 Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
 David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>
Cc: Harry Wentland <harry.wentland@....com>, Leo Li <sunpeng.li@....com>,
 Rodrigo Siqueira <siqueira@...lia.com>,
 Alex Deucher <alexander.deucher@....com>,
 Christian König <christian.koenig@....com>,
 Wayne Lin <Wayne.Lin@....com>, amd-gfx@...ts.freedesktop.org,
 linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org
Subject: Re: [PATCH v6 3/7] drm/edid: MSO should only be used for non-eDP
 displays



On 2025-11-26 15:10, Jani Nikula wrote:
> On Wed, 26 Nov 2025, Yaroslav Bolyukin <iam@...h.pw> wrote:
>> As per DisplayID v2.1a spec:
>> If Offset 06h[2:0] is programmed to 001b (External DisplayPort), this
>> field shall be cleared to 00b (Not supported).
>>
>> Link: https://lore.kernel.org/lkml/3abc1087618c822e5676e67a3ec2e64e506dc5ec@intel.com/
>> Signed-off-by: Yaroslav Bolyukin <iam@...h.pw>
>> ---
>>   drivers/gpu/drm/drm_displayid_internal.h |  4 +++
>>   drivers/gpu/drm/drm_edid.c               | 36 +++++++++++++++---------
>>   2 files changed, 27 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/drm_displayid_internal.h b/drivers/gpu/drm/drm_displayid_internal.h
>> index 5b1b32f73516..72f107ae832f 100644
>> --- a/drivers/gpu/drm/drm_displayid_internal.h
>> +++ b/drivers/gpu/drm/drm_displayid_internal.h
>> @@ -142,9 +142,13 @@ struct displayid_formula_timing_block {
>>   	struct displayid_formula_timings_9 timings[];
>>   } __packed;
>>   
>> +#define DISPLAYID_VESA_DP_TYPE		GENMASK(2, 0)
>>   #define DISPLAYID_VESA_MSO_OVERLAP	GENMASK(3, 0)
>>   #define DISPLAYID_VESA_MSO_MODE		GENMASK(6, 5)
>>   
>> +#define DISPLAYID_VESA_DP_TYPE_EDP	0
>> +#define DISPLAYID_VESA_DP_TYPE_DP	1
>> +
>>   struct displayid_vesa_vendor_specific_block {
>>   	struct displayid_block base;
>>   	u8 oui[3];
>> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
>> index a52fd6de9327..348aa31aea1b 100644
>> --- a/drivers/gpu/drm/drm_edid.c
>> +++ b/drivers/gpu/drm/drm_edid.c
>> @@ -6533,6 +6533,7 @@ static void drm_parse_vesa_specific_block(struct drm_connector *connector,
>>   	struct displayid_vesa_vendor_specific_block *vesa =
>>   		(struct displayid_vesa_vendor_specific_block *)block;
>>   	struct drm_display_info *info = &connector->display_info;
>> +	int dp_type;
>>   
>>   	if (block->num_bytes < 3) {
>>   		drm_dbg_kms(connector->dev,
>> @@ -6551,20 +6552,29 @@ static void drm_parse_vesa_specific_block(struct drm_connector *connector,
>>   		return;
>>   	}
>>   
>> -	switch (FIELD_GET(DISPLAYID_VESA_MSO_MODE, vesa->mso)) {
>> -	default:
>> -		drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] Reserved MSO mode value\n",
>> +	dp_type = FIELD_GET(DISPLAYID_VESA_DP_TYPE, vesa->data_structure_type);
>> +	if (dp_type > 1) {
>> +		drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] Reserved dp type value\n",
>>   			    connector->base.id, connector->name);
>> -		fallthrough;
>> -	case 0:
>> -		info->mso_stream_count = 0;
>> -		break;
>> -	case 1:
>> -		info->mso_stream_count = 2; /* 2 or 4 links */
>> -		break;
>> -	case 2:
>> -		info->mso_stream_count = 4; /* 4 links */
>> -		break;
>> +	}
>> +
>> +	/* MSO is not supported for eDP */
>> +	if (dp_type != DISPLAYID_VESA_DP_TYPE_EDP) {
> 
> MSO is *only* supported on eDP, not the other way round!
> 
> BR,
> Jani.
> 

Oh, yes. For some reason I thought that MSO == MST, and it made no sense 
for me why would MST be only supported on eDP, I see now that this is a 
separate thing. I should probably don't include this patch in the 
patchset, since this is the only part that I don't have hardware to test

>> +		switch (FIELD_GET(DISPLAYID_VESA_MSO_MODE, vesa->mso)) {
>> +		default:
>> +			drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] Reserved MSO mode value\n",
>> +				    connector->base.id, connector->name);
>> +			fallthrough;
>> +		case 0:
>> +			info->mso_stream_count = 0;
>> +			break;
>> +		case 1:
>> +			info->mso_stream_count = 2; /* 2 or 4 links */
>> +			break;
>> +		case 2:
>> +			info->mso_stream_count = 4; /* 4 links */
>> +			break;
>> +		}
>>   	}
>>   
>>   	if (info->mso_stream_count) {
> 


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ