lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <c32eb9e4-41fa-4d17-a214-d7f594f34d82@0la.ch>
Date: Wed, 26 Nov 2025 15:35:11 +0100
From: Yaroslav <iam@....ch>
To: Jani Nikula <jani.nikula@...ux.intel.com>, Yaroslav Bolyukin
 <iam@...h.pw>, Ville Syrjälä
 <ville.syrjala@...ux.intel.com>,
 Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
 Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
 David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>
Cc: Harry Wentland <harry.wentland@....com>, Leo Li <sunpeng.li@....com>,
 Rodrigo Siqueira <siqueira@...lia.com>,
 Alex Deucher <alexander.deucher@....com>,
 Christian König <christian.koenig@....com>,
 Wayne Lin <Wayne.Lin@....com>, amd-gfx@...ts.freedesktop.org,
 linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org
Subject: Re: [PATCH v6 4/7] drm/edid: parse DSC DPP passthru support flag for
 mode VII timings



On 2025-11-26 15:19, Jani Nikula wrote:
> On Wed, 26 Nov 2025, Yaroslav Bolyukin <iam@...h.pw> wrote:
> 
> The commit message goes here.
> 
>> Signed-off-by: Yaroslav Bolyukin <iam@...h.pw>
>> ---
>>   drivers/gpu/drm/drm_displayid_internal.h |  2 ++
>>   drivers/gpu/drm/drm_edid.c               | 12 ++++++++----
>>   include/drm/drm_modes.h                  | 10 ++++++++++
>>   3 files changed, 20 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/drm_displayid_internal.h b/drivers/gpu/drm/drm_displayid_internal.h
>> index 72f107ae832f..724174b429f2 100644
>> --- a/drivers/gpu/drm/drm_displayid_internal.h
>> +++ b/drivers/gpu/drm/drm_displayid_internal.h
>> @@ -97,6 +97,7 @@ struct displayid_header {
>>   	u8 ext_count;
>>   } __packed;
>>   
>> +#define DISPLAYID_BLOCK_REV	GENMASK(2, 0)
>>   struct displayid_block {
>>   	u8 tag;
>>   	u8 rev;
>> @@ -125,6 +126,7 @@ struct displayid_detailed_timings_1 {
>>   	__le16 vsw;
>>   } __packed;
>>   
>> +#define DISPLAYID_BLOCK_PASSTHROUGH_TIMINGS_SUPPORT	BIT(3)
>>   struct displayid_detailed_timing_block {
>>   	struct displayid_block base;
>>   	struct displayid_detailed_timings_1 timings[];
>> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
>> index 348aa31aea1b..72a94b1713e2 100644
>> --- a/drivers/gpu/drm/drm_edid.c
>> +++ b/drivers/gpu/drm/drm_edid.c
>> @@ -6792,8 +6792,8 @@ static void update_display_info(struct drm_connector *connector,
>>   }
>>   
>>   static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device *dev,
>> -							    const struct displayid_detailed_timings_1 *timings,
>> -							    bool type_7)
>> +							    const struct displayid_block *block,
>> +							    const struct displayid_detailed_timings_1 *timings)
>>   {
>>   	struct drm_display_mode *mode;
>>   	unsigned int pixel_clock = (timings->pixel_clock[0] |
>> @@ -6809,11 +6809,16 @@ static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device *d
>>   	unsigned int vsync_width = le16_to_cpu(timings->vsw) + 1;
>>   	bool hsync_positive = le16_to_cpu(timings->hsync) & (1 << 15);
>>   	bool vsync_positive = le16_to_cpu(timings->vsync) & (1 << 15);
>> +	bool type_7 = block->tag == DATA_BLOCK_2_TYPE_7_DETAILED_TIMING;
>>   
>>   	mode = drm_mode_create(dev);
>>   	if (!mode)
>>   		return NULL;
>>   
>> +	if (type_7 && FIELD_GET(DISPLAYID_BLOCK_REV, block->rev) >= 1)
>> +		mode->dsc_passthrough_timings_support =
>> +			!!(block->rev & DISPLAYID_BLOCK_PASSTHROUGH_TIMINGS_SUPPORT);
> 
> The !! and parentheses are superfluous.
> 

Most of the other instances of bitflag parsing logic in kernel seem to 
cast integers to booleans explicitly this way.

I'm fine with simplifying that, I was only doing what everyone else does.

>> +
>>   	/* resolution is kHz for type VII, and 10 kHz for type I */
>>   	mode->clock = type_7 ? pixel_clock : pixel_clock * 10;
>>   	mode->hdisplay = hactive;
>> @@ -6846,7 +6851,6 @@ static int add_displayid_detailed_1_modes(struct drm_connector *connector,
>>   	int num_timings;
>>   	struct drm_display_mode *newmode;
>>   	int num_modes = 0;
>> -	bool type_7 = block->tag == DATA_BLOCK_2_TYPE_7_DETAILED_TIMING;
>>   	/* blocks must be multiple of 20 bytes length */
>>   	if (block->num_bytes % 20)
>>   		return 0;
>> @@ -6855,7 +6859,7 @@ static int add_displayid_detailed_1_modes(struct drm_connector *connector,
>>   	for (i = 0; i < num_timings; i++) {
>>   		struct displayid_detailed_timings_1 *timings = &det->timings[i];
>>   
>> -		newmode = drm_mode_displayid_detailed(connector->dev, timings, type_7);
>> +		newmode = drm_mode_displayid_detailed(connector->dev, block, timings);
>>   		if (!newmode)
>>   			continue;
>>   
>> diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h
>> index b9bb92e4b029..312e5c03af9a 100644
>> --- a/include/drm/drm_modes.h
>> +++ b/include/drm/drm_modes.h
>> @@ -417,6 +417,16 @@ struct drm_display_mode {
>>   	 */
>>   	enum hdmi_picture_aspect picture_aspect_ratio;
>>   
>> +	/**
>> +	 * @dsc_passthrough_timing_support:
>> +	 *
>> +	 * Indicates whether this mode timing descriptor is supported
>> +	 * with specific target DSC bits per pixel only.
>> +	 *
>> +	 * VESA vendor-specific data block shall exist with the relevant
>> +	 * DSC bits per pixel declaration when this flag is set to true.
>> +	 */
>> +	bool dsc_passthrough_timings_support;
>>   };
>>   
>>   /**
> 


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ