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Message-ID: <20251126-augmented-lobster-from-neptune-d7bbb5@kuoka>
Date: Wed, 26 Nov 2025 09:54:50 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Pankaj Patil <pankaj.patil@....qualcomm.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Conor Dooley <conor@...nel.org>,
Jonathan Cameron <jonathan.cameron@...wei.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/3] dt-bindings: cache: qcom,llcc: Document Glymur
LLCC block
On Tue, Nov 25, 2025 at 02:46:22PM +0530, Pankaj Patil wrote:
> Document the Last Level Cache Controller on Glymur SoC
> Glymur LLCC has 12 base register regions and an additional AND, OR
> broadcast region, total 14 register regions
> Increase maxItems for reg and reg-names to allow 14 entries for Glymur
>
> Signed-off-by: Pankaj Patil <pankaj.patil@....qualcomm.com>
> ---
> .../devicetree/bindings/cache/qcom,llcc.yaml | 47 +++++++++++++++++++++-
> 1 file changed, 45 insertions(+), 2 deletions(-)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@....qualcomm.com>
Best regards,
Krzysztof
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