[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <48d3b29b-1010-4749-aef0-c66a72f1d8fa@microchip.com>
Date: Thu, 27 Nov 2025 16:08:25 +0000
From: Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>, Mark Brown
<broonie@...nel.org>
CC: david laight <david.laight@...box.com>, <linux-spi@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, Prajna Rajendra Kumar - M74368
<prajna.rajendrakumar@...rochip.com>, Conor Dooley - M52691
<Conor.Dooley@...rochip.com>
Subject: Re: [PATCH v2 2/6] spi: microchip-core: Refactor FIFO read and write
handlers
On 26/11/2025 12:13, Andy Shevchenko wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Wed, Nov 26, 2025 at 12:05:22PM +0000, Mark Brown wrote:
>> On Wed, Nov 26, 2025 at 09:21:45AM +0000, david laight wrote:
> ...
>
>>> I'm not sure I don't prefer the version with one writeb() call.
>>> How about:
>>> writeb(spi->tx_buf ? *spi->tx_buf++ : 0xaa,
>>> spi->regs + MCHP_CORESPI_REG_TXDATA);
>> Please don't abuse the ternery operator like this, just write normal
>> conditional statements.
> FWIW, that's what my patch does already :-)
>
> --
> With Best Regards,
> Andy Shevchenko
>
>
Hi Andy,
Thanks for the series. However, this particular patch appears to
introduce a regression. The SPI controller reads an incorrect
Device ID from the peripheral.
I’m investigating the root cause and will follow up.
Best regards,
Prajna
Powered by blists - more mailing lists