[<prev] [next>] [day] [month] [year] [list]
Message-Id: <20251127-ifpc_counters-v3-1-fac0a126bc88@gmail.com>
Date: Thu, 27 Nov 2025 19:22:35 +0100
From: Anna Maniscalco <anna.maniscalco2000@...il.com>
To: Rob Clark <robin.clark@....qualcomm.com>, Sean Paul <sean@...rly.run>,
Konrad Dybcio <konradybcio@...nel.org>,
Akhil P Oommen <akhilpo@....qualcomm.com>,
Dmitry Baryshkov <lumag@...nel.org>,
Abhinav Kumar <abhinav.kumar@...ux.dev>,
Jessica Zhang <jesszhan0024@...il.com>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>
Cc: linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
stable@...r.kernel.org, Anna Maniscalco <anna.maniscalco2000@...il.com>,
Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
Subject: [PATCH v3] drm/msm: add PERFCTR_CNTL to ifpc_reglist
Previously this register would become 0 after IFPC took place which
broke all usages of counters.
Fixes: a6a0157cc68e ("drm/msm/a6xx: Enable IFPC on Adreno X1-85")
Cc: stable@...r.kernel.org
Signed-off-by: Anna Maniscalco <anna.maniscalco2000@...il.com>
Reviewed-by: Akhil P Oommen <akhilpo@....qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
---
Changes in v3:
- Added missing Cc: stable to commit
- Collected Rb tags
- Link to v2: https://lore.kernel.org/r/20251126-ifpc_counters-v2-1-b798bc433eff@gmail.com
Changes in v2:
- Added Fixes tag
- Link to v1: https://lore.kernel.org/r/20251126-ifpc_counters-v1-1-f2d5e7048032@gmail.com
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
index 29107b362346..b731491dc522 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
@@ -1392,6 +1392,7 @@ static const u32 a750_ifpc_reglist_regs[] = {
REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE(2),
REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE(3),
REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE(4),
+ REG_A6XX_RBBM_PERFCTR_CNTL,
REG_A6XX_TPL1_NC_MODE_CNTL,
REG_A6XX_SP_NC_MODE_CNTL,
REG_A6XX_CP_DBG_ECO_CNTL,
---
base-commit: 7bc29d5fb6faff2f547323c9ee8d3a0790cd2530
change-id: 20251126-ifpc_counters-e8d53fa3252e
Best regards,
--
Anna Maniscalco <anna.maniscalco2000@...il.com>
Powered by blists - more mailing lists