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Message-ID: <ace280a8-e8cf-4eeb-a924-f88ec1f4ac67@linux.intel.com>
Date: Thu, 27 Nov 2025 16:39:16 +0800
From: Binbin Wu <binbin.wu@...ux.intel.com>
To: Chao Gao <chao.gao@...el.com>
Cc: linux-coco@...ts.linux.dev, linux-kernel@...r.kernel.org, x86@...nel.org,
 reinette.chatre@...el.com, ira.weiny@...el.com, kai.huang@...el.com,
 dan.j.williams@...el.com, yilun.xu@...ux.intel.com, sagis@...gle.com,
 vannapurve@...gle.com, paulmck@...nel.org, nik.borisov@...e.com,
 Farrah Chen <farrah.chen@...el.com>, "Kirill A. Shutemov" <kas@...nel.org>,
 Dave Hansen <dave.hansen@...ux.intel.com>,
 Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
 Borislav Petkov <bp@...en8.de>, "H. Peter Anvin" <hpa@...or.com>
Subject: Re: [PATCH v2 11/21] x86/virt/seamldr: Allocate and populate a module
 update request



On 11/27/2025 4:30 PM, Binbin Wu wrote:
> 
> 
> On 10/1/2025 10:52 AM, Chao Gao wrote:
> [...]
>> +
>> +/* Allocate and populate a seamldr_params */
>> +static struct seamldr_params *alloc_seamldr_params(const void *module, int module_size,
>> +                           const void *sig, int sig_size)
>> +{
>> +    struct seamldr_params *params;
>> +    const u8 *ptr;
>> +    int i;
>> +
>> +    BUILD_BUG_ON(sizeof(struct seamldr_params) != SZ_4K);
>> +    if (module_size > SEAMLDR_MAX_NR_MODULE_4KB_PAGES * SZ_4K)
>> +        return ERR_PTR(-EINVAL);
>> +
>> +    if (!IS_ALIGNED(module_size, SZ_4K) || !IS_ALIGNED(sig_size, SZ_4K) ||
>> +        !IS_ALIGNED((unsigned long)module, SZ_4K) ||
>> +        !IS_ALIGNED((unsigned long)sig, SZ_4K))
>> +        return ERR_PTR(-EINVAL);
>> +
>> +    /* seamldr_params accepts one 4KB-page for sigstruct */
>> +    if (sig_size != SZ_4K)
> According to the link [2] you provided above, it seems that the layout of
> tdx_blob as following:
> tdx_blob
> |- u16      version
> |- u16      checksum
> |- u32      offset_of_module  --------------------------------------|
> |- u8       signature[8]  |
> |- u32      len                                     8KB + (N * 4KB) |
> |- u32      resv1 |
> |- u64      resv2[509]  |
> |- u8       data[]  |
>              |- _u64 sigstruct[256]   //2KB sigstruct  |
>              |- _u64 reserved2[256]  |
>              |- _u64 reserved3[N*512] //4KB aligned, optional, N >=0  |
>              |- _u8  module[]  //<-----------------------------|

Sorry about the mess.

tdx_blob
|- u16      version
|- u16      checksum
|- u32      offset_of_module   --------------------------------------|
|- u8       signature[8]                                             |
|- u32      len                                     8KB + (N * 4KB)  |
|- u32      resv1                                                    |
|- u64      resv2[509]                                               |
|- u8       data[]                                                   |
             |- _u64 sigstruct[256]   //2KB sigstruct                 |
             |- _u64 reserved2[256]                                   |
             |- _u64 reserved3[N*512] //4KB aligned, optional, N >=0  |
             |- _u8  module[]         //<-----------------------------|

> 
> If N is not 0 for reserved3, then the sig_size passed will not be 4KB.
> 
> 

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