linux-kernel - Re: [PATCH v1 2/2] pinctrl: qcom: sa8775p-lpass-lpi: Add SA8775P LPASS pinctrl

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Message-ID: <78307922-3922-40b7-be89-5c2bacbdffdf@oss.qualcomm.com>
Date: Thu, 27 Nov 2025 12:06:00 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Mohammad Rafi Shaik <mohammad.rafi.shaik@....qualcomm.com>,
        Bjorn Andersson <andersson@...nel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
 <conor+dt@...nel.org>,
        Srinivas Kandagatla <srinivas.kandagatla@....qualcomm.com>
Cc: linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        kernel@....qualcomm.com, ajay.nandam@....qualcomm.com,
        ravi.hothi@....qualcomm.com
Subject: Re: [PATCH v1 2/2] pinctrl: qcom: sa8775p-lpass-lpi: Add SA8775P
 LPASS pinctrl

On 11/26/25 6:31 AM, Mohammad Rafi Shaik wrote:
> 
> 
> On 11/17/2025 6:47 PM, Konrad Dybcio wrote:
>> On 11/16/25 6:16 PM, Mohammad Rafi Shaik wrote:
>>> Add pin control support for Low Power Audio SubSystem (LPASS)
>>> of Qualcomm SA8775P SoC.
>>>
>>> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@....qualcomm.com>
>>> ---
>>
>> [...]
>>
>>
>>> +static const struct lpi_pingroup sa8775p_groups[] = {
>>> +    LPI_PINGROUP(0, 0, swr_tx_clk, qua_mi2s_sclk, _, _),
>>> +    LPI_PINGROUP(1, 2, swr_tx_data, qua_mi2s_ws, _, _),
>>> +    LPI_PINGROUP(2, 4, swr_tx_data, qua_mi2s_data, _, _),
>>> +    LPI_PINGROUP(3, 8, swr_rx_clk, qua_mi2s_data, _, _),
>>> +    LPI_PINGROUP(4, 10, swr_rx_data, qua_mi2s_data, _, _),
>>> +    LPI_PINGROUP(5, 12, swr_rx_data, ext_mclk1_c, qua_mi2s_data, _),
>>> +    LPI_PINGROUP(6, LPI_NO_SLEW, dmic1_clk, i2s1_clk, _, _),
>>> +    LPI_PINGROUP(7, LPI_NO_SLEW, dmic1_data, i2s1_ws, _, _),
>>> +    LPI_PINGROUP(8, LPI_NO_SLEW, dmic2_clk, i2s1_data, _, _),
>>> +    LPI_PINGROUP(9, LPI_NO_SLEW, dmic2_data, i2s1_data, ext_mclk1_b, _),
>>> +    LPI_PINGROUP(10, 16, i2s2_clk, wsa_swr_clk, _, _),
>>> +    LPI_PINGROUP(11, 18, i2s2_ws, wsa_swr_data, _, _),
>>> +    LPI_PINGROUP(12, LPI_NO_SLEW, dmic3_clk, i2s4_clk, _, _),
>>> +    LPI_PINGROUP(13, LPI_NO_SLEW, dmic3_data, i2s4_ws, ext_mclk1_a, _),
>>> +    LPI_PINGROUP(14, 6, swr_tx_data, ext_mclk1_d, _, _),
>>> +    LPI_PINGROUP(15, 20, i2s2_data, wsa2_swr_clk, _, _),
>>> +    LPI_PINGROUP(16, 21, i2s2_data, wsa2_swr_data, _, _),
>>
>> The max slew rate value (shift) here defined in the register map is 18 for
>> this platform
>>
> 
> ACK, will update proper rates.

It (although generally very unlikely) may be that the register map is missing
something. You probably know the hardware better, or know who to ask. Please
check that.

Konrad