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Message-Id: <20251127125305.89961-6-cuiyunhui@bytedance.com>
Date: Thu, 27 Nov 2025 20:53:02 +0800
From: Yunhui Cui <cuiyunhui@...edance.com>
To: conor@...nel.org,
	paul.walmsley@...ive.com,
	palmer@...belt.com,
	aou@...s.berkeley.edu,
	alex@...ti.fr,
	cuiyunhui@...edance.com,
	luxu.kernel@...edance.com,
	linux-kernel@...r.kernel.org,
	linux-riscv@...ts.infradead.org,
	jassisinghbrar@...il.com,
	conor.dooley@...rochip.com,
	valentina.fernandezalanis@...rochip.com,
	catalin.marinas@....com,
	will@...nel.org,
	maz@...nel.org,
	timothy.hayes@....com,
	lpieralisi@...nel.org,
	arnd@...db.de,
	kees@...nel.org,
	tglx@...utronix.de,
	viresh.kumar@...aro.org,
	boqun.feng@...il.com,
	linux-arm-kernel@...ts.infradead.org,
	cleger@...osinc.com,
	atishp@...osinc.com,
	ajones@...tanamicro.com
Subject: [PATCH v3 5/8] riscv: smp: use NMI for CPU stop

Use NMI instead of IPI for CPU stop if RISC-V SSE NMI is supported.

Signed-off-by: Yunhui Cui <cuiyunhui@...edance.com>
---
 arch/riscv/include/asm/smp.h           |  2 ++
 arch/riscv/kernel/smp.c                | 10 +++++++---
 drivers/firmware/riscv/riscv_sse_nmi.c |  1 +
 3 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
index f53f1f0e7aa9e..e01ea962adfc4 100644
--- a/arch/riscv/include/asm/smp.h
+++ b/arch/riscv/include/asm/smp.h
@@ -63,6 +63,8 @@ static inline void cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
 }
 #endif
 
+void cpu_stop(void);
+
 /* Secondary hart entry */
 asmlinkage void smp_callin(void);
 
diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c
index 1b8cf986abbd0..bca95ec0b0f74 100644
--- a/arch/riscv/kernel/smp.c
+++ b/arch/riscv/kernel/smp.c
@@ -69,7 +69,7 @@ int riscv_hartid_to_cpuid(unsigned long hartid)
 	return -ENOENT;
 }
 
-static void ipi_stop(void)
+void cpu_stop(void)
 {
 	set_cpu_online(smp_processor_id(), false);
 	while (1)
@@ -127,7 +127,7 @@ static irqreturn_t handle_IPI(int irq, void *data)
 		generic_smp_call_function_interrupt();
 		break;
 	case IPI_CPU_STOP:
-		ipi_stop();
+		cpu_stop();
 		break;
 	case IPI_CPU_CRASH_STOP:
 		cpu_crash_stop(cpu, get_irq_regs());
@@ -259,7 +259,11 @@ void smp_send_stop(void)
 
 		if (system_state <= SYSTEM_RUNNING)
 			pr_crit("SMP: stopping secondary CPUs\n");
-		send_ipi_mask(&mask, IPI_CPU_STOP);
+
+		if (!nmi_support())
+			send_ipi_mask(&mask, IPI_CPU_STOP);
+		else
+			send_nmi_mask(&mask, LOCAL_NMI_CRASH);
 	}
 
 	/* Wait up to one second for other CPUs to stop */
diff --git a/drivers/firmware/riscv/riscv_sse_nmi.c b/drivers/firmware/riscv/riscv_sse_nmi.c
index add028efd25a0..02e2de2bb70f7 100644
--- a/drivers/firmware/riscv/riscv_sse_nmi.c
+++ b/drivers/firmware/riscv/riscv_sse_nmi.c
@@ -58,6 +58,7 @@ static int local_nmi_handler(u32 evt, void *arg, struct pt_regs *regs)
 	type = atomic_read(this_cpu_ptr(&local_nmi));
 
 	NMI_HANDLE(LOCAL_NMI_CRASH, cpu_crash_stop, cpu, regs);
+	NMI_HANDLE(LOCAL_NMI_STOP, cpu_stop);
 
 	atomic_andnot(type, this_cpu_ptr(&local_nmi));
 
-- 
2.39.5


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