lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <63274dd281ac94f2680a4aa91f541de82435fda5.camel@mailbox.org>
Date: Thu, 27 Nov 2025 14:51:39 +0100
From: Philipp Stanner <phasta@...lbox.org>
To: Andi Shyti <andi.shyti@...nel.org>, Matthew Brost
 <matthew.brost@...el.com>
Cc: Philipp Stanner <phasta@...nel.org>, Sumit Semwal
 <sumit.semwal@...aro.org>,  Gustavo Padovan <gustavo@...ovan.org>,
 Christian König <christian.koenig@....com>, Felix
 Kuehling <Felix.Kuehling@....com>, Alex Deucher
 <alexander.deucher@....com>, David Airlie <airlied@...il.com>, Simona
 Vetter <simona@...ll.ch>, Jani Nikula <jani.nikula@...ux.intel.com>, Joonas
 Lahtinen <joonas.lahtinen@...ux.intel.com>,  Rodrigo Vivi
 <rodrigo.vivi@...el.com>, Tvrtko Ursulin <tursulin@...ulin.net>, Huang Rui
 <ray.huang@....com>,  Matthew Auld <matthew.auld@...el.com>, Maarten
 Lankhorst <maarten.lankhorst@...ux.intel.com>, Maxime Ripard
 <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>, Lucas De
 Marchi <lucas.demarchi@...el.com>, Thomas Hellström
 <thomas.hellstrom@...ux.intel.com>, linux-media@...r.kernel.org, 
 dri-devel@...ts.freedesktop.org, linaro-mm-sig@...ts.linaro.org, 
 linux-kernel@...r.kernel.org, amd-gfx@...ts.freedesktop.org, 
 intel-gfx@...ts.freedesktop.org, intel-xe@...ts.freedesktop.org, 
 rust-for-linux@...r.kernel.org
Subject: Re: [PATCH 3/6] drm/gpu/xe: Ignore dma_fenc_signal() return code

On Thu, 2025-11-27 at 14:37 +0100, Andi Shyti wrote:
> Hi Matt,
> 
> On Wed, Nov 26, 2025 at 03:56:32PM -0800, Matthew Brost wrote:
> > On Wed, Nov 26, 2025 at 11:56:57PM +0100, Andi Shyti wrote:
> > > > @@ -85,7 +85,6 @@ void xe_hw_fence_irq_finish(struct xe_hw_fence_irq *irq)
> > > > @@ -93,9 +92,9 @@ void xe_hw_fence_irq_finish(struct xe_hw_fence_irq *irq)
> > > >  		spin_lock_irqsave(&irq->lock, flags);
> > > >  		list_for_each_entry_safe(fence, next, &irq->pending, irq_link) {
> > > >  			list_del_init(&fence->irq_link);
> > > > -			err = dma_fence_signal_locked(&fence->dma);
> > > 
> > > why don't we do
> > > 
> > > XE_WARN_ON(dma_fence_signal_locked(..))

because it's impossible because the series is about removing the return
codes from the dma_fence_signal_* functions.

> > > 
> > 
> > IIRC the above statement can compile out. So the patch looks correct to me.
> 
> you have defined XE_WARN_ON as WARN_ON that should always
> evaluate the content and, depending on the configuration, it
> prints the logs or not.
> 
> What I don't like from this patch is that we end up checking
> twice for the DMA_FENCE_FLAG_SIGNALED_BIT bit.

Depends on what you mean by "we". The Xe code checks it only once, with
dma_fence_test_signaled_flag(). The dma_fence backend checks it yet
again, as it always does, to avoid signaling a signaled fence.

That's not racy here, however, because the fence lock is already being
held, as evidenced by the current usage of dma_fence_signal_locked().


P.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ