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Message-ID: <20251128185518.3989250-1-andriy.shevchenko@linux.intel.com>
Date: Fri, 28 Nov 2025 19:52:38 +0100
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>,
Mark Brown <broonie@...nel.org>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
linux-spi@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v4 0/2] spi: microchip-core: Code improvements (part 2)
Here is the second part of the set of refactoring and cleaning it up.
Changelog v4:
- collected tags (Prajna)
- dropped applied patches
- added a new patch 2
v3: <20251127190031.2998705-1-andriy.shevchenko@...ux.intel.com>
Changelog v3:
- collected tags (Prajna)
- restored dummy read in TX-only transfers
v2: <20251126075558.2035012-1-andriy.shevchenko@...ux.intel.com>
Changelog v2:
- dropped device property agnostic API conversion change (Mark)
Andy Shevchenko (2):
spi: microchip-core: Refactor FIFO read and write handlers
spi: microchip-core: use XOR instead of ANDNOT to simplify the logic
drivers/spi/spi-microchip-core-spi.c | 33 +++++++++++-----------------
1 file changed, 13 insertions(+), 20 deletions(-)
--
2.50.1
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