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Message-ID: <09aed728-51ca-42dd-b680-f6597e0ac00a@rock-chips.com>
Date: Fri, 28 Nov 2025 09:03:52 +0800
From: Shawn Lin <shawn.lin@...k-chips.com>
To: Sushrut Shree Trivedi <sushrut.trivedi@....qualcomm.com>,
 Jingoo Han <jingoohan1@...il.com>, Manivannan Sadhasivam <mani@...nel.org>,
 Lorenzo Pieralisi <lpieralisi@...nel.org>,
 Krzysztof Wilczyński <kwilczynski@...nel.org>,
 Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
 cros-qcom-dts-watchers@...omium.org, Bjorn Andersson <andersson@...nel.org>,
 Konrad Dybcio <konradybcio@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>
Cc: shawn.lin@...k-chips.com, linux-pci@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
 devicetree@...r.kernel.org
Subject: Re: [PATCH 1/2] PCI: dwc: Program device-id

在 2025/11/27 星期四 23:30, Sushrut Shree Trivedi 写道:
> For some controllers, HW doesn't program the correct device-id
> leading to incorrect identification in lspci. For ex, QCOM
> controller SC7280 uses same device id as SM8250. This would
> cause issues while applying controller specific quirks.
> 
> So, program the correct device-id after reading it from the
> devicetree.
> 
> Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@....qualcomm.com>
> ---
>   drivers/pci/controller/dwc/pcie-designware-host.c | 7 +++++++
>   drivers/pci/controller/dwc/pcie-designware.h      | 2 ++
>   2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index e92513c5bda5..e8b975044b22 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -619,6 +619,9 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
>   		}
>   	}
>   
> +	pp->device_id = 0xffff;
> +	of_property_read_u32(np, "device-id", &pp->device_id);
> +
>   	dw_pcie_version_detect(pci);
>   
>   	dw_pcie_iatu_detect(pci);
> @@ -1094,6 +1097,10 @@ int dw_pcie_setup_rc(struct dw_pcie_rp *pp)
>   
>   	dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, 0);
>   
> +	/* Program correct device id */
> +	if (pp->device_id != 0xffff)
> +		dw_pcie_writew_dbi(pci, PCI_DEVICE_ID, pp->device_id);
> +
>   	/* Program correct class for RC */
>   	dw_pcie_writew_dbi(pci, PCI_CLASS_DEVICE, PCI_CLASS_BRIDGE_PCI);
>   
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index e995f692a1ec..eff6da9438c4 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -431,6 +431,8 @@ struct dw_pcie_rp {
>   	struct pci_config_window *cfg;
>   	bool			ecam_enabled;
>   	bool			native_ecam;
> +	u32			vendor_id;

I don't see where vendor_id is used.
And why should dwc core take care of per HW bugs, could someone else
will argue their HW doesn't program correct vender id/class code, then
we add more into dw_pcie_rp to fix these?

How about do it in the defective HW drivers?


> +	u32			device_id;
>   };
>   
>   struct dw_pcie_ep_ops {
> 


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