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Message-ID: <20251129185203.380002-2-biju.das.jz@bp.renesas.com>
Date: Sat, 29 Nov 2025 18:51:56 +0000
From: Biju <biju.das.au@...il.com>
To: Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: Biju Das <biju.das.jz@...renesas.com>,
linux-renesas-soc@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>,
Biju Das <biju.das.au@...il.com>
Subject: [PATCH v2 1/4] arm64: dts: renesas: r9a09g047: Add RSCI nodes
From: Biju Das <biju.das.jz@...renesas.com>
Add RSCI nodes to RZ/G3E ("R9A09G047") SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
---
v1->v2:
* Updated the compatible from r9a09g047-rscif->r9a09g047-rsci.
* Renamed clk from bus->pclk
* Rearranged tclk{4,16,64} clks.
* Added missing irqs aed and bfd.
* Used hexadecimal numbers for module clocks and resets, for
easier matching with the documentation.
---
arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 220 +++++++++++++++++++++
1 file changed, 220 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
index d1bf16c6ff6b..824da0b7b85a 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
@@ -823,6 +823,226 @@ i2c8: i2c@...01000 {
status = "disabled";
};
+ rsci0: serial@...00c00 {
+ compatible = "renesas,r9a09g047-rsci";
+ reg = <0 0x12800c00 0 0x400>;
+ interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 115 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "eri", "rxi", "txi", "tei",
+ "aed", "bfd";
+ clocks = <&cpg CPG_MOD 0x5d>, <&cpg CPG_MOD 0x5e>,
+ <&cpg CPG_MOD 0x61>, <&cpg CPG_MOD 0x60>,
+ <&cpg CPG_MOD 0x5f>;
+ clock-names = "pclk", "tclk", "tclk_div4",
+ "tclk_div16", "tclk_div64";
+ power-domains = <&cpg>;
+ resets = <&cpg 0x81>, <&cpg 0x82>;
+ reset-names = "presetn", "tresetn";
+ status = "disabled";
+ };
+
+ rsci1: serial@...01000 {
+ compatible = "renesas,r9a09g047-rsci";
+ reg = <0 0x12801000 0 0x400>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "eri", "rxi", "txi", "tei",
+ "aed", "bfd";
+ clocks = <&cpg CPG_MOD 0x62>, <&cpg CPG_MOD 0x63>,
+ <&cpg CPG_MOD 0x66>, <&cpg CPG_MOD 0x65>,
+ <&cpg CPG_MOD 0x64>;
+ clock-names = "pclk", "tclk", "tclk_div4",
+ "tclk_div16", "tclk_div64";
+ power-domains = <&cpg>;
+ resets = <&cpg 0x83>, <&cpg 0x84>;
+ reset-names = "presetn", "tresetn";
+ status = "disabled";
+ };
+
+ rsci2: serial@...01400 {
+ compatible = "renesas,r9a09g047-rsci";
+ reg = <0 0x12801400 0 0x400>;
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "eri", "rxi", "txi", "tei",
+ "aed", "bfd";
+ clocks = <&cpg CPG_MOD 0x67>, <&cpg CPG_MOD 0x68>,
+ <&cpg CPG_MOD 0x6b>, <&cpg CPG_MOD 0x6a>,
+ <&cpg CPG_MOD 0x69>;
+ clock-names = "pclk", "tclk", "tclk_div4",
+ "tclk_div16", "tclk_div64";
+ power-domains = <&cpg>;
+ resets = <&cpg 0x85>, <&cpg 0x86>;
+ reset-names = "presetn", "tresetn";
+ status = "disabled";
+ };
+
+ rsci3: serial@...01800 {
+ compatible = "renesas,r9a09g047-rsci";
+ reg = <0 0x12801800 0 0x400>;
+ interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "eri", "rxi", "txi", "tei",
+ "aed", "bfd";
+ clocks = <&cpg CPG_MOD 0x6c>, <&cpg CPG_MOD 0x6d>,
+ <&cpg CPG_MOD 0x70>, <&cpg CPG_MOD 0x6f>,
+ <&cpg CPG_MOD 0x6e>;
+ clock-names = "pclk", "tclk", "tclk_div4",
+ "tclk_div16", "tclk_div64";
+ power-domains = <&cpg>;
+ resets = <&cpg 0x87>, <&cpg 0x88>;
+ reset-names = "presetn", "tresetn";
+ status = "disabled";
+ };
+
+ rsci4: serial@...01c00 {
+ compatible = "renesas,r9a09g047-rsci";
+ reg = <0 0x12801c00 0 0x400>;
+ interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "eri", "rxi", "txi", "tei",
+ "aed", "bfd";
+ clocks = <&cpg CPG_MOD 0x71>, <&cpg CPG_MOD 0x72>,
+ <&cpg CPG_MOD 0x75>, <&cpg CPG_MOD 0x74>,
+ <&cpg CPG_MOD 0x73>;
+ clock-names = "pclk", "tclk", "tclk_div4",
+ "tclk_div16", "tclk_div64";
+ power-domains = <&cpg>;
+ resets = <&cpg 0x89>, <&cpg 0x8a>;
+ reset-names = "presetn", "tresetn";
+ status = "disabled";
+ };
+
+ rsci5: serial@...02000 {
+ compatible = "renesas,r9a09g047-rsci";
+ reg = <0 0x12802000 0 0x400>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "eri", "rxi", "txi", "tei",
+ "aed", "bfd";
+ clocks = <&cpg CPG_MOD 0x76>, <&cpg CPG_MOD 0x77>,
+ <&cpg CPG_MOD 0x7a>, <&cpg CPG_MOD 0x79>,
+ <&cpg CPG_MOD 0x78>;
+ clock-names = "pclk", "tclk", "tclk_div4",
+ "tclk_div16", "tclk_div64";
+ power-domains = <&cpg>;
+ resets = <&cpg 0x8b>, <&cpg 0x8c>;
+ reset-names = "presetn", "tresetn";
+ status = "disabled";
+ };
+
+ rsci6: serial@...02400 {
+ compatible = "renesas,r9a09g047-rsci";
+ reg = <0 0x12802400 0 0x400>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "eri", "rxi", "txi", "tei",
+ "aed", "bfd";
+ clocks = <&cpg CPG_MOD 0x7b>, <&cpg CPG_MOD 0x7c>,
+ <&cpg CPG_MOD 0x7f>, <&cpg CPG_MOD 0x7e>,
+ <&cpg CPG_MOD 0x7d>;
+ clock-names = "pclk", "tclk", "tclk_div4",
+ "tclk_div16", "tclk_div64";
+ power-domains = <&cpg>;
+ resets = <&cpg 0x8d>, <&cpg 0x8e>;
+ reset-names = "presetn", "tresetn";
+ status = "disabled";
+ };
+
+ rsci7: serial@...02800 {
+ compatible = "renesas,r9a09g047-rsci";
+ reg = <0 0x12802800 0 0x400>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 157 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 160 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "eri", "rxi", "txi", "tei",
+ "aed", "bfd";
+ clocks = <&cpg CPG_MOD 0x80>, <&cpg CPG_MOD 0x81>,
+ <&cpg CPG_MOD 0x84>, <&cpg CPG_MOD 0x83>,
+ <&cpg CPG_MOD 0x82>;
+ clock-names = "pclk", "tclk", "tclk_div4",
+ "tclk_div16", "tclk_div64";
+ power-domains = <&cpg>;
+ resets = <&cpg 0x8f>, <&cpg 0x90>;
+ reset-names = "presetn", "tresetn";
+ status = "disabled";
+ };
+
+ rsci8: serial@...02c00 {
+ compatible = "renesas,r9a09g047-rsci";
+ reg = <0 0x12802c00 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "eri", "rxi", "txi", "tei",
+ "aed", "bfd";
+ clocks = <&cpg CPG_MOD 0x85>, <&cpg CPG_MOD 0x86>,
+ <&cpg CPG_MOD 0x89>, <&cpg CPG_MOD 0x88>,
+ <&cpg CPG_MOD 0x87>;
+ clock-names = "pclk", "tclk", "tclk_div4",
+ "tclk_div16", "tclk_div64";
+ power-domains = <&cpg>;
+ resets = <&cpg 0x91>, <&cpg 0x92>;
+ reset-names = "presetn", "tresetn";
+ status = "disabled";
+ };
+
+ rsci9: serial@...03000 {
+ compatible = "renesas,r9a09g047-rsci";
+ reg = <0 0x12803000 0 0x400>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "eri", "rxi", "txi", "tei",
+ "aed", "bfd";
+ clocks = <&cpg CPG_MOD 0x8a>, <&cpg CPG_MOD 0x8b>,
+ <&cpg CPG_MOD 0x8e>, <&cpg CPG_MOD 0x8d>,
+ <&cpg CPG_MOD 0x8c>;
+ clock-names = "pclk", "tclk", "tclk_div4",
+ "tclk_div16", "tclk_div64";
+ power-domains = <&cpg>;
+ resets = <&cpg 0x93>, <&cpg 0x94>;
+ reset-names = "presetn", "tresetn";
+ status = "disabled";
+ };
+
gpu: gpu@...50000 {
compatible = "renesas,r9a09g047-mali",
"arm,mali-bifrost";
--
2.43.0
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