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Message-ID: <c4sfp6mr65jbt3pfjc5ozeijum3pehjjlxocaloweu4g6y4v7a@p62qqui55tu7>
Date: Sat, 29 Nov 2025 12:58:29 +0530
From: Manivannan Sadhasivam <mani@...nel.org>
To: Sushrut Shree Trivedi <sushrut.trivedi@....qualcomm.com>
Cc: Jingoo Han <jingoohan1@...il.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>, Krzysztof Wilczyński <kwilczynski@...nel.org>,
Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
cros-qcom-dts-watchers@...omium.org, Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH 1/2] PCI: dwc: Program device-id
On Thu, Nov 27, 2025 at 09:00:51PM +0530, Sushrut Shree Trivedi wrote:
> For some controllers, HW doesn't program the correct device-id
> leading to incorrect identification in lspci. For ex, QCOM
> controller SC7280 uses same device id as SM8250.
The Device ID you are programming is for the Root Port, not for the
controller/Host bridge.
> This would
> cause issues while applying controller specific quirks.
>
This statement is misleading and wrong. Controller specific quirks cannot be
applied using Root Port IDs. We have controller specific DT compatible propery
for that purpose.
> So, program the correct device-id after reading it from the
> devicetree.
>
Even though the dtschema allows having these Root Port IDs in the controller
node, it is deprecated (odd that we don't mark it as such). These properties are
supposed to be added to the Root Port binding and the DWC core should parse them
and program the IDs if available.
But the DWC driver doesn't parse Root Port nodes atm. OTOH, your colleague is
working on a series that does that and once that gets submitted, please rebase
this series on top and resend.
- Mani
> Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@....qualcomm.com>
> ---
> drivers/pci/controller/dwc/pcie-designware-host.c | 7 +++++++
> drivers/pci/controller/dwc/pcie-designware.h | 2 ++
> 2 files changed, 9 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index e92513c5bda5..e8b975044b22 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -619,6 +619,9 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
> }
> }
>
> + pp->device_id = 0xffff;
> + of_property_read_u32(np, "device-id", &pp->device_id);
> +
> dw_pcie_version_detect(pci);
>
> dw_pcie_iatu_detect(pci);
> @@ -1094,6 +1097,10 @@ int dw_pcie_setup_rc(struct dw_pcie_rp *pp)
>
> dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, 0);
>
> + /* Program correct device id */
> + if (pp->device_id != 0xffff)
> + dw_pcie_writew_dbi(pci, PCI_DEVICE_ID, pp->device_id);
> +
> /* Program correct class for RC */
> dw_pcie_writew_dbi(pci, PCI_CLASS_DEVICE, PCI_CLASS_BRIDGE_PCI);
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index e995f692a1ec..eff6da9438c4 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -431,6 +431,8 @@ struct dw_pcie_rp {
> struct pci_config_window *cfg;
> bool ecam_enabled;
> bool native_ecam;
> + u32 vendor_id;
> + u32 device_id;
> };
>
> struct dw_pcie_ep_ops {
>
> --
> 2.25.1
>
--
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