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Message-Id: <20251201-james-perf-config-bits-v1-6-22ecbbf8007c@linaro.org>
Date: Mon, 01 Dec 2025 16:41:09 +0000
From: James Clark <james.clark@...aro.org>
To: Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Namhyung Kim <namhyung@...nel.org>, Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>, Ian Rogers <irogers@...gle.com>,
Adrian Hunter <adrian.hunter@...el.com>,
Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach <mike.leach@...aro.org>, John Garry <john.g.garry@...cle.com>,
Will Deacon <will@...nel.org>, Leo Yan <leo.yan@...ux.dev>
Cc: linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
coresight@...ts.linaro.org, linux-arm-kernel@...ts.infradead.org,
James Clark <james.clark@...aro.org>
Subject: [PATCH 6/7] perf cs-etm: Don't hard code config attribute when
configuring the event
These instances of hard coded config attributes are used for configuring
and validating the event options. Use the config attribute that's
published by the driver by replacing the open coded operations with
evsel__get_config_val() and evsel__set_config_if_unset().
Signed-off-by: James Clark <james.clark@...aro.org>
---
tools/perf/arch/arm/util/cs-etm.c | 66 ++++++++++++++++++++++-----------------
1 file changed, 37 insertions(+), 29 deletions(-)
diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c
index 51ca8fa66ef8..52e304584095 100644
--- a/tools/perf/arch/arm/util/cs-etm.c
+++ b/tools/perf/arch/arm/util/cs-etm.c
@@ -103,13 +103,20 @@ static int cs_etm_validate_context_id(struct perf_pmu *cs_etm_pmu, struct evsel
struct perf_cpu cpu)
{
int err;
- __u64 val;
- u64 contextid = evsel->core.attr.config &
- (perf_pmu__format_bits(cs_etm_pmu, "contextid") |
- perf_pmu__format_bits(cs_etm_pmu, "contextid1") |
- perf_pmu__format_bits(cs_etm_pmu, "contextid2"));
+ u64 ctxt, ctxt1, ctxt2;
+ __u64 trcidr2;
- if (!contextid)
+ err = evsel__get_config_val(cs_etm_pmu, evsel, "contextid", &ctxt);
+ if (err)
+ return err;
+ err = evsel__get_config_val(cs_etm_pmu, evsel, "contextid1", &ctxt1);
+ if (err)
+ return err;
+ err = evsel__get_config_val(cs_etm_pmu, evsel, "contextid2", &ctxt2);
+ if (err)
+ return err;
+
+ if (!ctxt && !ctxt1 && !ctxt2)
return 0;
/* Not supported in etmv3 */
@@ -120,12 +127,11 @@ static int cs_etm_validate_context_id(struct perf_pmu *cs_etm_pmu, struct evsel
}
/* Get a handle on TRCIDR2 */
- err = cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR2], &val);
+ err = cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR2], &trcidr2);
if (err)
return err;
- if (contextid &
- perf_pmu__format_bits(cs_etm_pmu, "contextid1")) {
+ if (ctxt1) {
/*
* TRCIDR2.CIDSIZE, bit [9-5], indicates whether contextID
* tracing is supported:
@@ -133,15 +139,14 @@ static int cs_etm_validate_context_id(struct perf_pmu *cs_etm_pmu, struct evsel
* 0b00100 Maximum of 32-bit Context ID size.
* All other values are reserved.
*/
- if (BMVAL(val, 5, 9) != 0x4) {
+ if (BMVAL(trcidr2, 5, 9) != 0x4) {
pr_err("%s: CONTEXTIDR_EL1 isn't supported, disable with %s/contextid1=0/\n",
CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME);
return -EINVAL;
}
}
- if (contextid &
- perf_pmu__format_bits(cs_etm_pmu, "contextid2")) {
+ if (ctxt2) {
/*
* TRCIDR2.VMIDOPT[30:29] != 0 and
* TRCIDR2.VMIDSIZE[14:10] == 0b00100 (32bit virtual contextid)
@@ -149,7 +154,7 @@ static int cs_etm_validate_context_id(struct perf_pmu *cs_etm_pmu, struct evsel
* virtual context id is < 32bit.
* Any value of VMIDSIZE >= 4 (i.e, > 32bit) is fine for us.
*/
- if (!BMVAL(val, 29, 30) || BMVAL(val, 10, 14) < 4) {
+ if (!BMVAL(trcidr2, 29, 30) || BMVAL(trcidr2, 10, 14) < 4) {
pr_err("%s: CONTEXTIDR_EL2 isn't supported, disable with %s/contextid2=0/\n",
CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME);
return -EINVAL;
@@ -163,10 +168,14 @@ static int cs_etm_validate_timestamp(struct perf_pmu *cs_etm_pmu, struct evsel *
struct perf_cpu cpu)
{
int err;
- __u64 val;
+ u64 val;
+ __u64 trcidr0;
- if (!(evsel->core.attr.config &
- perf_pmu__format_bits(cs_etm_pmu, "timestamp")))
+ err = evsel__get_config_val(cs_etm_pmu, evsel, "timestamp", &val);
+ if (err)
+ return err;
+
+ if (!val)
return 0;
if (cs_etm_get_version(cs_etm_pmu, cpu) == CS_ETMV3) {
@@ -176,7 +185,7 @@ static int cs_etm_validate_timestamp(struct perf_pmu *cs_etm_pmu, struct evsel *
}
/* Get a handle on TRCIRD0 */
- err = cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0], &val);
+ err = cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0], &trcidr0);
if (err)
return err;
@@ -187,10 +196,9 @@ static int cs_etm_validate_timestamp(struct perf_pmu *cs_etm_pmu, struct evsel *
* 0b00110 Implementation supports a maximum timestamp of 48bits.
* 0b01000 Implementation supports a maximum timestamp of 64bits.
*/
- val &= GENMASK(28, 24);
- if (!val) {
+ trcidr0 &= GENMASK(28, 24);
+ if (!trcidr0)
return -EINVAL;
- }
return 0;
}
@@ -273,16 +281,20 @@ static int cs_etm_parse_snapshot_options(struct auxtrace_record *itr,
return 0;
}
+/*
+ * The sink name format "@sink_name" is used, lookup the sink by name to convert
+ * to "sinkid=sink_hash" format.
+ *
+ * If the user has already manually provided a hash then "sinkid" isn't
+ * overwritten. If neither are provided then the driver will pick the best sink.
+ */
static int cs_etm_set_sink_attr(struct perf_pmu *pmu,
struct evsel *evsel)
{
char msg[BUFSIZ], path[PATH_MAX], *sink;
struct evsel_config_term *term;
- int ret = -EINVAL;
u32 hash;
-
- if (evsel->core.attr.config2 & GENMASK(31, 0))
- return 0;
+ int ret;
list_for_each_entry(term, &evsel->config_terms, list) {
if (term->type != EVSEL__CONFIG_TERM_DRV_CFG)
@@ -305,14 +317,10 @@ static int cs_etm_set_sink_attr(struct perf_pmu *pmu,
return ret;
}
- evsel->core.attr.config2 |= hash;
+ evsel__set_config_if_unset(pmu, evsel, "sinkid", hash);
return 0;
}
- /*
- * No sink was provided on the command line - allow the CoreSight
- * system to look for a default
- */
return 0;
}
--
2.34.1
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