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Message-ID: <2010740416.11902.1764624886863.JavaMail.zimbra@nod.at>
Date: Mon, 1 Dec 2025 22:34:46 +0100 (CET)
From: Richard Weinberger <richard@....at>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: linux-kernel <linux-kernel@...r.kernel.org>, 
	linux-omap <linux-omap@...r.kernel.org>, 
	devicetree <devicetree@...r.kernel.org>, 
	Arnd Bergmann <arnd@...db.de>, Lee Jones <lee@...nel.org>, 
	dakr <dakr@...nel.org>, "Rafael J. Wysocki" <rafael@...nel.org>, 
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>, 
	Mark Brown <broonie@...nel.org>, tony <tony@...mide.com>, 
	rogerq <rogerq@...nel.org>, khilman <khilman@...libre.com>, 
	Andreas Kemnade <andreas@...nade.info>, 
	aaro koskinen <aaro.koskinen@....fi>, 
	Conor Dooley <conor+dt@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, robh <robh@...nel.org>
Subject: Re: [PATCH 1/4] dt-bindings: Document new common property:
 has-inaccessible-regs

----- Ursprüngliche Mail -----
> Von: "Krzysztof Kozlowski" <krzk@...nel.org>
>>>> What solution do you propose?
>>>> Splitting reg = <0x0 0x1400> into many tiny fractions and not using an mfd
>>>> anymore?
>>>
>>> Fix the driver. In your case, the syscon driver.
>> 
>> Please help me to understand what the desired behavior of the driver is.
>> 
>> Currently syscon creates one regmap for everything and passes this regmap
>> to the individual syscon users.
>> These users have to know what offset within the regmap is their playground.
>> If I understand correctly, it would be better if every syscon user would
>> register their own regmap?
> 
> I don't think so. This device driver, so the syscon, creates the regmap
> and knows EXACTLY which registers are valid or not. It is not
> responsibility of the consumer to tell the syscon what this syscon is.
> Syscon knows that...

How to configure this in syscon?
AFAIK it takes only a single reg property.
Are you suggesting to add many more syscon nodes to the DT to skip the holes?

Currently the scm_conf@0 DT node defines the first 0x1400 bytes
of the CTRL_MODULE_CORE register[0].

Reading from register 0x180 triggers an async data abort here.
The manual describes it as "RESERVED" of type "R".
Lots of other offsets in CTRL_MODULE_CORE are reserved, but reading works.

Long story short, please tell me how to model it in DT and I'll do so.

Thanks,
//richard

[0] https://www.ti.com/lit/ug/spruhz6l/spruhz6l.pdf 18.5.2.1 CTRL_MODULE_CORE Register Summary

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